AT32AP7002-CTUT Atmel, AT32AP7002-CTUT Datasheet - Page 853

• Manufacturer Part Number: AT32AP7002-CTUT
• Description: IC MCU 32BIT AVR32 196-CBGA
• Manufacturer: Atmel
• Series: AVR®32 AP7r

Specifications of AT32AP7002-CTUT

• Core Processor: AVR
• Core Size: 32-Bit
• Speed: 150MHz
• Connectivity: EBI/EMI, I²C, MMC, PS2, SPI, SSC, UART/USART, USB
• Peripherals: AC'97, DMA, I²C, LCD, POR, PWM, WDT
• Number Of I /o: 85
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 1.95 V
• Data Converters: D/A 2x16b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 196-CBGA
• Data Bus Width: 32 bit
• Data Ram Size: 32 KB
• Interface Type: I2C, JTAG, PS2, SPI, SSC, UART, USART, USB
• Maximum Clock Frequency: 150 MHz
• Number Of Timers: 3
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Dac: 16 bit, 2 Channel
• Package: 196CTBGA
• Device Core: AVR32
• Family Name: AT32
• Maximum Speed: 150 MHz
• Operating Supply Voltage: 1.8|3.3 V
• For Use With: ATAVRONEKIT - KIT AVR/AVR32 DEBUGGER/PROGRMMRATNGW100 - KIT AVR32 NETWORK GATEWAYATSTK1000 - KIT STARTER FOR AVR32AP7000
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: Details

37.7.4
32054F–AVR32–09/09
MEMORY_BLOCK_ACCESS
Table 37-6.
This instruction allows access to the entire SAB data area. Up to 32 bits of data are accessed at
a time, while the address is sequentially incremented from the previously used address.
In this mode, the SAB address, and access direction is not provided with each access. Instead,
the previous address is auto-incremented and the previous operation repeated. The address
must be set up in advance with MEMORY_WORD_ACCESS. It is allowed, but not required, to
shift data after shifting the address.
This instruction is primarily intended to speed up large quantities of sequential word accesses..
The following sequence should be used:
1. Use the MEMORY_WORD_ACCESS to read or write the first location.
2. Apply MEMORY_BLOCK_ACCESS in the IR Scan path.
3. Select the DR Scan path. The address will now have incremented by 4 (corresponding to
4. For a read operation, scan out the contents of the next addressed location. For a write
5. Go to Update-DR
6. If the block access is not complete, return to Select-DR Scan and repeat the access.
7. If the block access is complete, return to Run-Test/Idle
For write operations, 32 data bits must be provided, or the result will be undefined. For read
operations, shifting may be terminated once the required number of bits have been acquired.
Table 37-7.
The overhead using block word access is 4 cycles per 32 bits of data, resulting in an 88% trans-
fer efficiency, or 2.1 MBytes per second with a 20 MHz TCK frequency.
Instructions
DR input value (Data write phase)
DR output value (Address phase)
DR output value (Data read phase)
DR output value (Data write phase)
Instructions
IR input value
IR output value
DR Size
DR input value (Data read phase)
DR input value (Data write phase)
DR output value (Data read phase)
DR output value (Data write phase)
the next word location).
operation, scan in the new contents of the next addressed location.
MEMORY_WORD_ACCESS details (Continued)
MEMORY_BLOCK_ACCESS details
Details
dddddddd dddddddd dddddddd dddddddd xxx
xxx xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx
xeb dddddddd dddddddd dddddddd dddddddd
xxx xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxeb
Details
10010 (0x12)
peb01
34 bits
xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx xx
dddddddd dddddddd dddddddd dddddddd xx
eb dddddddd dddddddd dddddddd dddddddd
xx xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxeb
AT32AP7002
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