AT32AP7002-CTUT Atmel, AT32AP7002-CTUT Datasheet - Page 740

• Manufacturer Part Number: AT32AP7002-CTUT
• Description: IC MCU 32BIT AVR32 196-CBGA
• Manufacturer: Atmel
• Series: AVR®32 AP7r

Specifications of AT32AP7002-CTUT

• Core Processor: AVR
• Core Size: 32-Bit
• Speed: 150MHz
• Connectivity: EBI/EMI, I²C, MMC, PS2, SPI, SSC, UART/USART, USB
• Peripherals: AC'97, DMA, I²C, LCD, POR, PWM, WDT
• Number Of I /o: 85
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 1.95 V
• Data Converters: D/A 2x16b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 196-CBGA
• Data Bus Width: 32 bit
• Data Ram Size: 32 KB
• Interface Type: I2C, JTAG, PS2, SPI, SSC, UART, USART, USB
• Maximum Clock Frequency: 150 MHz
• Number Of Timers: 3
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Dac: 16 bit, 2 Channel
• Package: 196CTBGA
• Device Core: AVR32
• Family Name: AT32
• Maximum Speed: 150 MHz
• Operating Supply Voltage: 1.8|3.3 V
• For Use With: ATAVRONEKIT - KIT AVR/AVR32 DEBUGGER/PROGRMMRATNGW100 - KIT AVR32 NETWORK GATEWAYATSTK1000 - KIT STARTER FOR AVR32AP7000
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: Details

32054F–AVR32–09/09
Figure 34-2. Datapath Structure
This module transforms the data read from the memory into a format according to the LCD mod-
ule used. It has four different interfaces: the input interface, the output interface, the
configuration interface and the control interface.
The datapath can be characterized by two parameters: initial_latency and cycles_per_data. The
parameter initial_latency is defined as the number of LCDC Core Clock cycles until the first data
is available at the output of the datapath. The parameter cycles_per_data is the minimum num-
ber of LCDC Core Clock cycles between two consecutive data at the output interface.
•The input interface connects the datapath with the DMA controller. It is a dual FIFO interface
•The output interface is a 24-bit data bus. The configuration of this interface depends on the
•The configuration interface connects the datapath with the configuration block. It is used to
•The control interface connects the datapath with the timing generation block. The main control
with a data bus and two push lines that are used by the DMA controller to fill the FIFOs.
type of LCD used (TFT or STN, Single or Dual Scan, 4-bit, 8-bit, 16-bit or 24-bit interface).
select between the different datapath configurations.
signal is the data-request signal, used by the timing generation module to request new data
from the datapath.
Serializer
Dithering
Palette
Output
Shifter
FIFO
Input Interface
Output Interface
Configuration IF
Control Interface
AT32AP7002
740