AT32AP7002-CTUT Atmel, AT32AP7002-CTUT Datasheet - Page 884

• Manufacturer Part Number: AT32AP7002-CTUT
• Description: IC MCU 32BIT AVR32 196-CBGA
• Manufacturer: Atmel
• Series: AVR®32 AP7r

Specifications of AT32AP7002-CTUT

• Core Processor: AVR
• Core Size: 32-Bit
• Speed: 150MHz
• Connectivity: EBI/EMI, I²C, MMC, PS2, SPI, SSC, UART/USART, USB
• Peripherals: AC'97, DMA, I²C, LCD, POR, PWM, WDT
• Number Of I /o: 85
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 1.95 V
• Data Converters: D/A 2x16b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 196-CBGA
• Data Bus Width: 32 bit
• Data Ram Size: 32 KB
• Interface Type: I2C, JTAG, PS2, SPI, SSC, UART, USART, USB
• Maximum Clock Frequency: 150 MHz
• Number Of Timers: 3
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Dac: 16 bit, 2 Channel
• Package: 196CTBGA
• Device Core: AVR32
• Family Name: AT32
• Maximum Speed: 150 MHz
• Operating Supply Voltage: 1.8|3.3 V
• For Use With: ATAVRONEKIT - KIT AVR/AVR32 DEBUGGER/PROGRMMRATNGW100 - KIT AVR32 NETWORK GATEWAYATSTK1000 - KIT STARTER FOR AVR32AP7000
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: Details

43. Datasheet Revision History
43.1
43.2
43.3
32054F–AVR32–09/09
Rev. F 09/09
Rev. E 09/09
Rev. D 09/07
Please note that the referring page numbers in this section are referred to this document. The
referring revision in this section are referring to the document revision.
1.
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Updated
Updated
PIO Controller C Multiplexing table updated in
Added section
USBA feature list updated in
Renamed clk_slow to clk_osc32 in
Updated organisation of User Interface in
Updated special bus granting mechanism in
Added product dependencies in
Added product dependencies in
Added description of multi-drive in
Added MDER/MDDR/MDSR to pin logic diagram in
page
SPI pins must be enabled to use local loopback.
Updated description of the OVRES bit in
Updated bit description of TXEMPTY in the
Number of chip select lines updatedin figures and tables, changed from 8 to 6 in
Memory Controller (SMC)” on page
Made the MDR register Read/Write instead of Read in
page
Removed the PWSEN and PWSDIS bits from the
Added PDCFBYTE and removed the PWSDIV bits from the
Added note about reading the Status Register clears the interrupt flag in
on page
Added debug operation to product dependencies in
Added debug operation to product dependencies in
(PWM)” on page
249.
532.
740.
”Errata” on page
”Errata” on page
”USBA” on page 81
774.
”Peripherals” on page
877.
877.
”DMA Controller (DMACA)” on page
”Peripheral DMA Controller (PDC)” on page
”Parallel Input/Output Controller (PIO)” on page
in Clock Connections in
Table 9-4 on page
489.
”SPI Status Register” on page
”HSB Bus Matrix (HMATRIX)” on page
”USART Channel Status Register” on page
”HSB Bus Matrix (HMATRIX)” on page
”Peripherals” on page
”MCI Control Register” on page
75.
”Parallel Input/Output Controller (PIO)” on
”Timer/Counter (TC)” on page
”Pulse Width Modulation Controller
80.
”SDRAM Controller (SDRAMC)” on
”Peripherals” on page
”MCI Mode Register” on page
AT32AP7002
75“.
165.
310.
”Timer/Counter (TC)”
233.
”Static
142.
75.
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