P87LPC768BD,512 NXP Semiconductors, P87LPC768BD,512 Datasheet - Page 16

• Manufacturer Part Number: P87LPC768BD,512
• Description: IC 80C51 MCU 4K OTP 20-SOIC
• Manufacturer: NXP Semiconductors
• Series: LPC700r

Specifications of P87LPC768BD,512

• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: I²C, UART/USART
• Peripherals: Brown-out Detect/Reset, LED, POR, PWM, WDT
• Number Of I /o: 18
• Program Memory Size: 4KB (4K x 8)
• Program Memory Type: OTP
• Ram Size: 128 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 6 V
• Data Converters: A/D 4x8b
• Oscillator Type: Internal
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 20-SOIC (7.5mm Width)
• Processor Series: P87LPC7x
• Core: 80C51
• Data Bus Width: 8 bit
• Data Ram Size: 128 B
• Interface Type: I2C, UART
• Maximum Clock Frequency: 10 MHz, 20 MHz
• Number Of Programmable I/os: 18
• Number Of Timers: 2
• Operating Supply Voltage: 2.7 V to 6 V
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: PK51, CA51, A51, ULINK2
• Minimum Operating Temperature: 0 C
• On-chip Adc: 8 bit, 4 Channel
• For Use With: OM10063 - PROGRAMMER LPC700 P76XLCPOM10050 - EMULATOR LPC700 PDS76X
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: 568-3218-5; 935267360512; P87LPC768BD

Philips Semiconductors
2002 Mar 12
Low power, low price, low pin count (20 pin) microcontroller
with 4 kB OTP 8-bit A/D, Pulse Width Modulator
(P0.5) CMPREF
(P0.4) CIN1A
(P0.3) CIN1B
(P0.2) CIN2A
(P0.1) CIN2B
CMPREF
CMPREF
Vref (1.23V)
V
ref
CINnA
CINnA
CINnB
CINnB
(1.23V)
CPn, CNn, OEn = 0 0 0
CPn, CNn, OEn = 0 1 0
CPn, CNn, OEn = 1 0 0
CPn, CNn, OEn = 1 1 0
V
ref
+
+
+
+
–
–
–
–
Figure 5. Comparator Input and Output Connections
CP1
CN1
CP2
CN2
COn
COn
COn
COn
Figure 6. Comparator Configurations
COMPARATOR 1
COMPARATOR 2
+
+
–
–
14
CO1
CO2
CHANGE DETECT
CHANGE DETECT
CMPREF
CMPREF
V
V
ref
ref
CINnA
CINnA
CINnB
CINnB
OE1
OE2
(1.23V)
(1.23V)
CPn, CNn, OEn = 0 0 1
CPn, CNn, OEn = 0 1 1
CPn, CNn, OEn = 1 0 1
CPn, CNn, OEn = 1 1 1
CMF2
CMF1
+
+
+
+
–
–
–
–
COn
COn
COn
COn
CMP1 (P0.6)
CMP2 (P0.0)
INTERRUPT
P87LPC768
INTERRUPT
SU01153
CMPn
CMPn
CMPn
CMPn
SU01154
Preliminary data