P87LPC768BD,512 NXP Semiconductors, P87LPC768BD,512 Datasheet - Page 17

• Manufacturer Part Number: P87LPC768BD,512
• Description: IC 80C51 MCU 4K OTP 20-SOIC
• Manufacturer: NXP Semiconductors
• Series: LPC700r

Specifications of P87LPC768BD,512

• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: I²C, UART/USART
• Peripherals: Brown-out Detect/Reset, LED, POR, PWM, WDT
• Number Of I /o: 18
• Program Memory Size: 4KB (4K x 8)
• Program Memory Type: OTP
• Ram Size: 128 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 6 V
• Data Converters: A/D 4x8b
• Oscillator Type: Internal
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 20-SOIC (7.5mm Width)
• Processor Series: P87LPC7x
• Core: 80C51
• Data Bus Width: 8 bit
• Data Ram Size: 128 B
• Interface Type: I2C, UART
• Maximum Clock Frequency: 10 MHz, 20 MHz
• Number Of Programmable I/os: 18
• Number Of Timers: 2
• Operating Supply Voltage: 2.7 V to 6 V
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: PK51, CA51, A51, ULINK2
• Minimum Operating Temperature: 0 C
• On-chip Adc: 8 bit, 4 Channel
• For Use With: OM10063 - PROGRAMMER LPC700 P76XLCPOM10050 - EMULATOR LPC700 PDS76X
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: 568-3218-5; 935267360512; P87LPC768BD

Philips Semiconductors
Internal Reference Voltage
An internal reference voltage generator may supply a default
reference when a single comparator input pin is used. The value of
the internal reference voltage, referred to as V
Comparator Interrupt
Each comparator has an interrupt flag CMFn contained in its
configuration register. This flag is set whenever the comparator
output changes state. The flag may be polled by software or may be
used to generate an interrupt. The interrupt will be generated when
the corresponding enable bit ECn in the IEN1 register is set and the
interrupt system is enabled via the EA bit in the IEN0 register.
Comparators and Power Reduction Modes
Either or both comparators may remain enabled when Power Down
or Idle mode is activated. The comparators will continue to function
in the power reduction mode. If a comparator interrupt is enabled, a
change of the comparator output state will generate an interrupt and
Pulse Width Modulator
The P87LPC768 contains four Pulse Width Modulated (PWM)
channels which generate pulses of programmable length and
interval. The output for PWM0 is on P0.1, PWM1 on P1.6, PWM2
on P1.7 and PWM3 on P0.0. After chip reset the internal output of
the each PWM channel is a “1.” Note that the state of the pin will
not reflect this if UCFG1.5, PRHI, is set to a zero. In this case
before the pin will reflect the state of the internal PWM output a “1”
must be written to each port bit that serves as a PWM output. A
block diagram is shown in Figure 8.
The interval between successive outputs is controlled by a 10–bit
down counter which uses the internal microcontroller clock as its
input. When bit 3 in the UCFG1 register is a “1” the microcontroller
2002 Mar 12
Low power, low price, low pin count (20 pin) microcontroller
with 4 kB OTP 8-bit A/D, Pulse Width Modulator
CmpInit:
mov
anl
orl
mov
call
anl
setb
setb
ret
PT0AD,#30h
P0M2,#0cfh
P0M1,#30h
CMP1,#24h
delay10us
CMP1,#0feh
EC1
EA
ref
, is 1.28 V 10%.
; Disable digital inputs on pins that are used
;
; Disable digital outputs on pins that are used
;
; Turn on comparator 1 and set up for:
;
;
;
; The comparator has to start up for at
;
; Clear comparator 1 interrupt flag.
; Enable the comparator 1 interrupt. The
;
; Enable the interrupt system (if needed).
; Return to caller.
for analog functions: CIN1A, CMPREF.
for analog functions: CIN1A, CMPREF.
– Positive input on CIN1A.
– Negative input from CMPREF pin.
– Output to CMP1 pin enabled.
least 10 microseconds before use.
priority is left at the current value.
Figure 7.
15
wake up the processor. If the comparator output to a pin is enabled,
the pin should be configured in the push-pull mode in order to obtain
fast switching times while in power down mode. The reason is that
with the oscillator stopped, the temporary strong pull-up that
normally occurs during switching on a quasi-bidirectional port pin
does not take place.
Comparators consume power in Power Down and Idle modes, as
well as in the normal operating mode. This fact should be taken into
account when system power consumption is an issue.
Comparator Configuration Example
The code shown in Figure 7 is an example of initializing one
comparator. Comparator 1 is configured to use the CIN1A and
CMPREF inputs, outputs the comparator result to the CMP1 pin,
and generates an interrupt when the comparator output changes.
The interrupt routine used for the comparator must clear the
interrupt flag (CMF1 in this case) before returning.
clock, and therefore the PWM counter clock, has the same
frequency as the clock source F
UCFG1 register is a “0” the microcontroller and PWM counter clocks
operate at half the frequency of clock source, F
When the counter reaches underflow it is reloaded with a user
selectable value. This mechanism allows the user to set the PWM
frequency at any integer sub–multiple of the microcontroller clock
frequency. The repetition frequency of the PWM is given by:
where CNSW is contained in CNSW0 and CNSW1 as described in
the following tables.
f
PWM
= F
CPWM
/ (CNSW+1)
CPWM
SU01189
= F
OSC
P87LPC768
. When bit 3 in the
CPWM
Preliminary data
= F
OSC
/2.