P87LPC768BD,512 NXP Semiconductors, P87LPC768BD,512 Datasheet - Page 36

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P87LPC768BD,512

Manufacturer Part Number
P87LPC768BD,512
Description
IC 80C51 MCU 4K OTP 20-SOIC
Manufacturer
NXP Semiconductors
Series
LPC700r
Datasheet

Specifications of P87LPC768BD,512

Core Processor
8051
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, UART/USART
Peripherals
Brown-out Detect/Reset, LED, POR, PWM, WDT
Number Of I /o
18
Program Memory Size
4KB (4K x 8)
Program Memory Type
OTP
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 6 V
Data Converters
A/D 4x8b
Oscillator Type
Internal
Operating Temperature
0°C ~ 70°C
Package / Case
20-SOIC (7.5mm Width)
Processor Series
P87LPC7x
Core
80C51
Data Bus Width
8 bit
Data Ram Size
128 B
Interface Type
I2C, UART
Maximum Clock Frequency
10 MHz, 20 MHz
Number Of Programmable I/os
18
Number Of Timers
2
Operating Supply Voltage
2.7 V to 6 V
Maximum Operating Temperature
+ 70 C
Mounting Style
SMD/SMT
3rd Party Development Tools
PK51, CA51, A51, ULINK2
Minimum Operating Temperature
0 C
On-chip Adc
8 bit, 4 Channel
For Use With
OM10063 - PROGRAMMER LPC700 P76XLCPOM10050 - EMULATOR LPC700 PDS76X
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details
Other names
568-3218-5
935267360512
P87LPC768BD
Philips Semiconductors
Table 9. Sources of Wakeup from Power Down Mode
2002 Mar 12
Wakeup Source
External Interrupt 0 or 1
Keyboard Interrupt
Comparator 1 or 2
Watchdog Timer Reset
Watchdog Timer Interrupt
Brownout Detect Reset
Brownout Detect Interrupt
Reset Input
A/D converter
Low power, low price, low pin count (20 pin) microcontroller
with 4 kB OTP 8-bit A/D, Pulse Width Modulator
Conditions
The corresponding interrupt must be enabled.
The keyboard interrupt feature must be enabled and properly set up. The corresponding interrupt must be
enabled.
The comparator(s) must be enabled and properly set up. The corresponding interrupt must be enabled.
The watchdog timer must be enabled via the WDTE bit in the UCFG1 EPROM configuration byte.
The WDTE bit in the UCFG1 EPROM configuration byte must not be set. The corresponding interrupt must
be enabled.
The BOD bit in AUXR1 must not be set (brownout detect not disabled). The BOI bit in AUXR1 must not be
set (brownout interrupt disabled).
The BOD bit in AUXR1 must not be set (brownout detect not disabled). The BOI bit in AUXR1 must be set
(brownout interrupt enabled). The corresponding interrupt must be enabled.
The external reset input must be enabled.
Must use internal RC clock (RCCLK = 1) for A/D converter to work in Power Down mode. The A/D must be
enabled and properly set up. The corresponding interrupt must be enabled.
34
P87LPC768
Preliminary data

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