P87LPC768BD,512 NXP Semiconductors, P87LPC768BD,512 Datasheet - Page 41

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P87LPC768BD,512

Manufacturer Part Number
P87LPC768BD,512
Description
IC 80C51 MCU 4K OTP 20-SOIC
Manufacturer
NXP Semiconductors
Series
LPC700r
Datasheet

Specifications of P87LPC768BD,512

Core Processor
8051
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, UART/USART
Peripherals
Brown-out Detect/Reset, LED, POR, PWM, WDT
Number Of I /o
18
Program Memory Size
4KB (4K x 8)
Program Memory Type
OTP
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 6 V
Data Converters
A/D 4x8b
Oscillator Type
Internal
Operating Temperature
0°C ~ 70°C
Package / Case
20-SOIC (7.5mm Width)
Processor Series
P87LPC7x
Core
80C51
Data Bus Width
8 bit
Data Ram Size
128 B
Interface Type
I2C, UART
Maximum Clock Frequency
10 MHz, 20 MHz
Number Of Programmable I/os
18
Number Of Timers
2
Operating Supply Voltage
2.7 V to 6 V
Maximum Operating Temperature
+ 70 C
Mounting Style
SMD/SMT
3rd Party Development Tools
PK51, CA51, A51, ULINK2
Minimum Operating Temperature
0 C
On-chip Adc
8 bit, 4 Channel
For Use With
OM10063 - PROGRAMMER LPC700 P76XLCPOM10050 - EMULATOR LPC700 PDS76X
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details
Other names
568-3218-5
935267360512
P87LPC768BD
Philips Semiconductors
Timer Overflow Toggle Output
Timers 0 and 1 can be configured to automatically toggle a port
output whenever a timer overflow occurs. The same device pins that
are used for the T0 and T1 count inputs are also used for the timer
toggle outputs. This function is enabled by control bits T0OE and
T1OE in the P2M1 register, and apply to Timer 0 and Timer 1
respectively. The port outputs will be a logic 1 prior to the first timer
overflow when this mode is turned on.
UART
The P87LPC768 includes an enhanced 80C51 UART. The baud rate
source for the UART is timer 1 for modes 1 and 3, while the rate is
fixed in modes 0 and 2. Because CPU clocking is different on the
P87LPC768 than on the standard 80C51, baud rate calculation is
somewhat different. Enhancements over the standard 80C51 UART
include Framing Error detection and automatic address recognition.
The serial port is full duplex, meaning it can transmit and receive
simultaneously. It is also receive-buffered, meaning it can
commence reception of a second byte before a previously received
byte has been read from the SBUF register. However, if the first byte
still hasn’t been read by the time reception of the second byte is
complete, the first byte will be lost. The serial port receive and
transmit registers are both accessed through Special Function
Register SBUF. Writing to SBUF loads the transmit register, and
reading SBUF accesses a physically separate receive register.
The serial port can be operated in 4 modes:
Mode 0
Serial data enters and exits through RxD. TxD outputs the shift
clock. 8 bits are transmitted or received, LSB first. The baud rate is
fixed at 1/6 of the CPU clock frequency.
2002 Mar 12
Low power, low price, low pin count (20 pin) microcontroller
with 4 kB OTP 8-bit A/D, Pulse Width Modulator
OSC/6
OSC/12
INT0 PIN
T0 PIN
GATE
TR0
OR
OSC/6
OSC/12
OR
C/T = 1
C/T = 0
Figure 30. Timer/Counter 0 Mode 3 (Two 8-Bit Counters)
TR1
CONTROL
CONTROL
39
uses SBUF as a destination register. Reception is initiated in Mode 0
Mode 1
10 bits are transmitted (through TxD) or received (through RxD): a
start bit (logical 0), 8 data bits (LSB first), and a stop bit (logical 1).
When data is received, the stop bit is stored in RB8 in Special
Function Register SCON. The baud rate is variable and is
determined by the Timer 1 overflow rate.
Mode 2
11 bits are transmitted (through TxD) or received (through RxD):
start bit (logical 0), 8 data bits (LSB first), a programmable 9th data
bit, and a stop bit (logical 1). When data is transmitted, the 9th data
bit (TB8 in SCON) can be assigned the value of 0 or 1. Or, for
example, the parity bit (P, in the PSW) could be moved into TB8.
When data is received, the 9th data bit goes into RB8 in Special
Function Register SCON, while the stop bit is ignored. The baud
rate is programmable to either 1/16 or 1/32 of the CPU clock
frequency, as determined by the SMOD1 bit in PCON.
Mode 3
11 bits are transmitted (through TxD) or received (through RxD): a
start bit (logical 0), 8 data bits (LSB first), a programmable 9th data
bit, and a stop bit (logical 1). In fact, Mode 3 is the same as Mode 2
in all respects except baud rate. The baud rate in Mode 3 is variable
and is determined by the Timer 1 overflow rate.
In all four modes, transmission is initiated by any instruction that
by the condition RI = 0 and REN = 1. Reception is initiated in the
other modes by the incoming start bit if REN = 1.
(8 BITS)
(8 BITS)
TH0
TL0
OVERFLOW
OVERFLOW
TOGGLE
TOGGLE
T0OE
T1OE
TF0
TF1
P87LPC768
INTERRUPT
T0 PIN
INTERRUPT
T1 PIN
Preliminary data
SU01176

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