P87LPC768BD,512 NXP Semiconductors, P87LPC768BD,512 Datasheet - Page 18

• Manufacturer Part Number: P87LPC768BD,512
• Description: IC 80C51 MCU 4K OTP 20-SOIC
• Manufacturer: NXP Semiconductors
• Series: LPC700r

Specifications of P87LPC768BD,512

• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: I²C, UART/USART
• Peripherals: Brown-out Detect/Reset, LED, POR, PWM, WDT
• Number Of I /o: 18
• Program Memory Size: 4KB (4K x 8)
• Program Memory Type: OTP
• Ram Size: 128 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 6 V
• Data Converters: A/D 4x8b
• Oscillator Type: Internal
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 20-SOIC (7.5mm Width)
• Processor Series: P87LPC7x
• Core: 80C51
• Data Bus Width: 8 bit
• Data Ram Size: 128 B
• Interface Type: I2C, UART
• Maximum Clock Frequency: 10 MHz, 20 MHz
• Number Of Programmable I/os: 18
• Number Of Timers: 2
• Operating Supply Voltage: 2.7 V to 6 V
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: PK51, CA51, A51, ULINK2
• Minimum Operating Temperature: 0 C
• On-chip Adc: 8 bit, 4 Channel
• For Use With: OM10063 - PROGRAMMER LPC700 P76XLCPOM10050 - EMULATOR LPC700 PDS76X
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: 568-3218-5; 935267360512; P87LPC768BD

Philips Semiconductors
The word “Shadow” in the above refers to the fact that writes are not
into the register that controls the counter; rather they are into a
holding register. As described below the transfer of data from this
2002 Mar 12
CNSW0: Counter Shadow register 0
Addr:
Reset Value:
CNSW1: Counter Shadow register 1
Addr:
Reset Value:
Low power, low price, low pin count (20 pin) microcontroller
with 4 kB OTP 8-bit A/D, Pulse Width Modulator
10 BIT COUNTER
10 BIT COUNTER
10 BIT SHADOW
REGISTER
REGISTER
BRAKE
RUN
Unused
CNSW7
BKCH
BRAKE CONTROL LOGIC
7
7
XFER
BKPS
0D1H
FFH
0D2H
FFH
Unused
CNSW6
A
10 BIT COMPARE
10 BIT SHADOW
6
REGISTER
REGISTER
6
BPEN
A>B
B
BKEN
Unused
CNSW5
5
5
Figure 8. PWM Block Diagram
2:1 MUX
A
PWM3
10 BIT COMPARE
10 BIT SHADOW
PWM3I
PWM3B
INTERNAL BUS
Unused
REGISTER
REGISTER
CNSW4
A>B
4
4
16
B
holding register, into the register which contains the actual reload
value, is controlled by the user’s program.
2:1 MUX
PWM2
Unused
PWM2I
PWM2B
CNSW3
3
3
A
10 BIT COMPARE
10 BIT SHADOW
REGISTER
REGISTER
A>B
Unused
2:1 MUX
CNSW2
PWM1
2
PWM1I
B
PWM1B
2
CNSW9
CNSW1
1
A
10 BIT COMPARE
10 BIT SHADOW
1
2:1 MUX
PWM0
REGISTER
REGISTER
P87LPC768
PWM0I
PWM0B
A>B
B
Preliminary data
CNSW8
CNSW0
SU01364
0
0