P87LPC768BD,512 NXP Semiconductors, P87LPC768BD,512 Datasheet - Page 9

• Manufacturer Part Number: P87LPC768BD,512
• Description: IC 80C51 MCU 4K OTP 20-SOIC
• Manufacturer: NXP Semiconductors
• Series: LPC700r

Specifications of P87LPC768BD,512

• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: I²C, UART/USART
• Peripherals: Brown-out Detect/Reset, LED, POR, PWM, WDT
• Number Of I /o: 18
• Program Memory Size: 4KB (4K x 8)
• Program Memory Type: OTP
• Ram Size: 128 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 6 V
• Data Converters: A/D 4x8b
• Oscillator Type: Internal
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 20-SOIC (7.5mm Width)
• Processor Series: P87LPC7x
• Core: 80C51
• Data Bus Width: 8 bit
• Data Ram Size: 128 B
• Interface Type: I2C, UART
• Maximum Clock Frequency: 10 MHz, 20 MHz
• Number Of Programmable I/os: 18
• Number Of Timers: 2
• Operating Supply Voltage: 2.7 V to 6 V
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: PK51, CA51, A51, ULINK2
• Minimum Operating Temperature: 0 C
• On-chip Adc: 8 bit, 4 Channel
• For Use With: OM10063 - PROGRAMMER LPC700 P76XLCPOM10050 - EMULATOR LPC700 PDS76X
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: 568-3218-5; 935267360512; P87LPC768BD

Philips Semiconductors
SPECIAL FUNCTION REGISTERS
2002 Mar 12
ACC*
ADCON#* A/D Control
AUXR1#
B*
CMP1#
CMP2#
CNSW0
CNSW1
CPSW0
CPSW1
CPSW2
CPSW3
CPSW4
DAC0#
DIVM#
DPTR:
I2CFG#*
I2CON#*
I2DAT#
IEN0*
IEN1#*
IP0*
IP0H#
IP1*
IP1H#
DPH
DPL
Low power, low price, low pin count (20 pin) microcontroller
with 4 kB OTP 8-bit A/D, Pulse Width Modulator
Name
Accumulator
Auxiliary Function Register
B register
Comparator 1 control
register
Comparator 2 control
register
PWM Counter Shadow
Register 0
PWM Counter Shadow
Register 1
PWM Compare Shadow
Register 0
PWM Compare Shadow
Register 1
PWM Compare Shadow
Register 2
PWM Compare Shadow
Register 3
PWM Compare Shadow
Register 4
A/D Result
CPU clock divide-by-M
control
Data pointer (2 bytes)
Data pointer high byte
Data pointer low byte
I
I
I
Interrupt enable 0
Interrupt enable 1
Interrupt priority 0
Interrupt priority 0 high byte
Interrupt priority 1
Interrupt priority 1 high byte
2
2
2
C configuration register
C control register
C data register
Description
Address
C8h/WR
D8h/WR
D9h/WR
C8h/RD
D8h/RD
D9h/RD
SFR
ACh
ADh
C0h
D1h
D2h
D3h
D4h
D5h
D6h
D7h
C5h
E0h
A2h
F0h
95h
83h
82h
A8h
E8h
B8h
B7h
F8h
F7h
CNSW7
–
CPSW07
CPSW17
CPSW27
CPSW37
CPSW39
SLAVEN
SLAVEN
ENADC
RDAT
RDAT
XDAT
PTIH
CXA
MSB
KBF
ETI
PTI
E7
C7
CF
DF
AF
EA
EF
BF
FF
F7
–
–
–
–
CNSW6
–
CPSW06
CPSW16
CPSW26
CPSW36
CPSW38
MASTRQ
MASTRQ
PWDH
EWD
PWD
BOD
IDLE
ATN
C6
CE
DE
AE
EE
BE
FE
E6
F6
–
–
–
0
x
–
–
–
7
CNSW5
–
CPSW05
CPSW15
CPSW25
CPSW35
CPSW29
CLRTI
DRDY
PBOH
PC1H
CDR
EBO
PBO
CE1
CE2
EC1
PC1
BOI
CD
DD
AD
ED
BD
E5
C5
FD
F5
–
0
0
x
Bit Functions and Addresses
CNSW4
–
CPSW04
CPSW14
CPSW24
CPSW34
CPSW28
TIRUN
TIRUN
CARL
PADH
LPEP
ADCI
EAD
PSH
PAD
CP1
CP2
ARL
CC
DC
AC
EC
BC
E4
C4
ES
PS
FC
F4
0
x
CNSW3
–
CPSW03
CPSW13
CPSW23
CPSW33
CPSW19
ADCS
SRST
CSTR
PT1H
CN1
CN2
STR
ET1
PT1
CB
DB
AB
EB
BB
E3
C3
F3
FB
–
–
0
x
–
–
–
RCCLK
CNSW2
–
CPSW02
CPSW12
CPSW22
CPSW32
CPSW18
CSTP
PX1H
PC2H
OE1
OE2
STP
EC2
PC2
EX1
PX1
C2
CA
DA
AA
EA
BA
E2
F2
FA
0
–
–
0
x
CNSW1
CNSW9
CPSW01
CPSW11
CPSW21
CPSW31
CPSW09
MASTER
AADR1
XSTR
PKBH
PT0H
CO1
CO2
EKB
PKB
CT1
CT1
ET0
PT0
E1
C1
F1
C9
D9
A9
E9
B9
F9
–
0
P87LPC768
x
CNSW0
CNSW8
CPSW00
CPSW10
CPSW20
CPSW30
CPSW08
AADR0
CMF1
CMF2
XSTP
PX0H
Preliminary data
LSB
PI2H
DPS
CT0
CT0
EX0
PX0
EI2
PI2
E0
C0
F0
C8
D8
A8
E8
B8
F8
–
0
x
00h
00h
02h
00h
00h
00h
FFh
FFh
00h
00h
00h
00h
00h
00h
00h
00h
00h
00h
80h
80h
00h
00h
00h
00h
00h
00h
Reset
Value
1
1
1
1
1
1
1
1
1
1