P87LPC768BD,512 NXP Semiconductors, P87LPC768BD,512 Datasheet - Page 54

• Manufacturer Part Number: P87LPC768BD,512
• Description: IC 80C51 MCU 4K OTP 20-SOIC
• Manufacturer: NXP Semiconductors
• Series: LPC700r

Specifications of P87LPC768BD,512

• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: I²C, UART/USART
• Peripherals: Brown-out Detect/Reset, LED, POR, PWM, WDT
• Number Of I /o: 18
• Program Memory Size: 4KB (4K x 8)
• Program Memory Type: OTP
• Ram Size: 128 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 6 V
• Data Converters: A/D 4x8b
• Oscillator Type: Internal
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 20-SOIC (7.5mm Width)
• Processor Series: P87LPC7x
• Core: 80C51
• Data Bus Width: 8 bit
• Data Ram Size: 128 B
• Interface Type: I2C, UART
• Maximum Clock Frequency: 10 MHz, 20 MHz
• Number Of Programmable I/os: 18
• Number Of Timers: 2
• Operating Supply Voltage: 2.7 V to 6 V
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: PK51, CA51, A51, ULINK2
• Minimum Operating Temperature: 0 C
• On-chip Adc: 8 bit, 4 Channel
• For Use With: OM10063 - PROGRAMMER LPC700 P76XLCPOM10050 - EMULATOR LPC700 PDS76X
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: 568-3218-5; 935267360512; P87LPC768BD

signature bytes designate the device as an P87LPC768 manufactured
with a serial programming method. Commands, addresses, and data
Philips Semiconductors
EPROM Characteristics
Programming of the EPROM on the P87LPC768 is accomplished
are transmitted to and from the device on two pins after
programming mode is entered. Serial programming allows easy
implementation of in-circuit programming of the P87LPC768 in an
application board. Details of In-System Programming can be found
in application note AN466.
The P87LPC768 contains three signature bytes that can be read and
used by an EPROM programming system to identify the device. The
by Philips. The signature bytes may be read by the user program at
addresses FC30h, FC31h and FC60h with the MOVC instruction,
using the DPTR register for addressing.
A special user data area is also available for access via the MOVC
instruction at addresses FCE0h through FCFFh. This “customer
code” space is programmed in the same manner as the main code
EPROM and may be used to store a serial number, manufacturing
date, or other application information.
2002 Mar 12
Low power, low price, low pin count (20 pin) microcontroller
with 4 kB OTP 8-bit A/D, Pulse Width Modulator
UCFG1
UCFG1.6
BIT
UCFG1.7
UCFG1.5
UCFG1.4
UCFG1.3
UCFG1.2–0 FOSC2–FSOC0
Address: FD00h
FOSC2–FOSC0
SYMBOL
WDTE
1 1 1
0 1 1
0 1 0
0 0 1
0 0 0
CLKR
PRHI
RPD
BOV
WDTE
7
Figure 39. EPROM System Configuration Byte 1 (UCFG1)
RPD
FUNCTION
Watchdog timer enable. When programmed (0), disables the watchdog timer. The timer may
still be used to generate an interrupt.
Reset pin disable. When 1 disables the reset function of pin P1.5, allowing it to be used as an
input only port pin.
Port reset high. When 1, ports reset to a high state. When 0, ports reset to a low state.
Brownout voltage select. When 1, the brownout detect voltage is 2.5V. When 0, the brownout
detect voltage is 3.8V. This is described in the Power Monitoring Functions section.
Clock rate select. When 0, the CPU clock rate is divided by 2. This results in machine cycles
taking 12 CPU clocks to complete as in the standard 80C51. For full backward compatibility,
this division applies to peripheral timing as well.
CPU oscillator type select. See Oscillator section for additional information. Combinations
other than those shown below should not be used. They are reserved for future use.
Oscillator Configuration
External clock input on X1 (default setting for an unprogrammed part).
Internal RC oscillator, 6 MHz 25%.
Low frequency crystal, 20 kHz to 100 kHz.
Medium frequency crystal or resonator, 100 kHz to 4 MHz.
High frequency crystal or resonator, 4 MHz to 20 MHz.
6
PRHI
5
BOV
4
52
32-Byte Customer Code Space
A small supplemental EPROM space is reserved for use by the
customer in order to identify code revisions, store checksums, add a
serial number to each device, or any other desired use. This area
exists in the code memory space from addresses FCE0h through
FCFFh. Code execution from this space is not supported, but it may
be read as data through the use of the MOVC instruction with the
appropriate addresses. The memory may be programmed at the
same time as the rest of the code memory and UCFG bytes are
programmed.
System Configuration Bytes
A number of user configurable features of the P87LPC768 must be
defined at power up and therefore cannot be set by the program after
start of execution. Those features are configured through the use of
two EPROM bytes that are programmed in the same manner as the
EPROM program space. The contents of the two configuration bytes,
UCFG1 and UCFG2, are shown in Figures 39 and 40. The values of
these bytes may be read by the program through the use of the
MOVX instruction at the addresses shown in the figure.
CLKR
3
FOSC2
2
FOSC1
1
FOSC0
0
Unprogrammed Value: FFh
P87LPC768
Preliminary data
SU01185