STM32F101V8T6 STMicroelectronics, STM32F101V8T6 Datasheet

MCU ARM 64KB FLASH/TIMER 100LQFP

STM32F101V8T6

Manufacturer Part Number
STM32F101V8T6
Description
MCU ARM 64KB FLASH/TIMER 100LQFP
Manufacturer
STMicroelectronics
Series
STM32r
Datasheet

Specifications of STM32F101V8T6

Core Processor
ARM® Cortex-M3™
Core Size
32-Bit
Speed
36MHz
Connectivity
I²C, IrDA, LIN, SPI, UART/USART
Peripherals
DMA, PDR, POR, PVD, PWM, Temp Sensor, WDT
Number Of I /o
80
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
10K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Data Converters
A/D 16x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-LQFP
Processor Series
STM32F101x
Core
ARM Cortex M3
Data Bus Width
32 bit
Data Ram Size
10 KB
Interface Type
I2C, SPI, USART
Maximum Clock Frequency
36 MHz
Number Of Programmable I/os
100
Number Of Timers
3 x 16 bit
Operating Supply Voltage
2 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWARM, EWARM-BL, MDK-ARM, RL-ARM, ULINK2
Minimum Operating Temperature
- 40 C
On-chip Adc
12 bit, 16 Channel
For Use With
497-10030 - STARTER KIT FOR STM32497-8853 - BOARD DEMO STM32 UNIV USB-UUSCIKSDKSTM32-PL - KIT IAR KICKSTART STM32 CORTEXM3497-8512 - KIT STARTER FOR STM32F10XE MCU497-8505 - KIT STARTER FOR STM32F10XE MCU497-8304 - KIT STM32 MOTOR DRIVER BLDC497-6438 - BOARD EVALUTION FOR STM32 512K497-6289 - KIT PERFORMANCE STICK FOR STM32MCBSTM32UME - BOARD EVAL MCBSTM32 + ULINK-MEMCBSTM32U - BOARD EVAL MCBSTM32 + ULINK2497-6053 - KIT STARTER FOR STM32497-6052 - KIT STARTER FOR STM32497-6050 - KIT STARTER FOR STM32497-6049 - KIT EVALUATION LOW COST STM32497-6048 - BOARD EVALUATION FOR STM32497-6047 - KIT DEVELOPMENT FOR STM32497-5046 - KIT TOOL FOR ST7/UPSD/STR7 MCU
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details
Other names
497-6060

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Features
April 2011
Core: ARM 32-bit Cortex™-M3 CPU
– 36 MHz maximum frequency,
– Single-cycle multiplication and hardware
Memories
– 64 to 128 Kbytes of Flash memory
– 10 to 16 Kbytes of SRAM
Clock, reset and supply management
– 2.0 to 3.6 V application supply and I/Os
– POR, PDR and programmable voltage
– 4-to-16 MHz crystal oscillator
– Internal 8 MHz factory-trimmed RC
– Internal 40 kHz RC
– PLL for CPU clock
– 32 kHz oscillator for RTC with calibration
Low power
– Sleep, Stop and Standby modes
– V
Debug mode
– Serial wire debug (SWD) and JTAG
DMA
– 7-channel DMA controller
– Peripherals supported: timers, ADC, SPIs,
1 × 12-bit, 1 µs A/D converter (up to 16
channels)
– Conversion range: 0 to 3.6 V
– Temperature sensor
Up to 80 fast I/O ports
– 26/37/51/80 I/Os, all mappable on 16
1.25 DMIPS/MHz (Dhrystone 2.1)
performance at 0 wait state memory
access
division
detector (PVD)
interfaces
I
external interrupt vectors and almost all
5 V-tolerant
Medium-density access line, ARM-based 32-bit MCU with 64 or
2
BAT
Cs and USARTs
128 KB Flash, 6 timers, ADC and 7 communication interfaces
supply for RTC and backup registers
Doc ID 13586 Rev 14
Table 1.
Six timers
– Three 16-bit timers, each with up to 4
– 2 watchdog timers (Independent and
– SysTick timer: 24-bit downcounter
Up to 7 communication interfaces
– Up to 2 x I
– Up to 3 USARTs (ISO 7816 interface, LIN,
– Up to 2 SPIs (18 Mbit/s)
CRC calculation unit, 96-bit unique ID
ECOPACK
STM32F101xB
STM32F101x8
7 x 7 mm
LQFP48
Reference
IC/OC/PWM or pulse counter
Window)
IrDA capability, modem control)
14 x 14 mm
LQFP100
Device summary
®
packages
2
C interfaces (SMBus/PMBus)
STM32F101xB
VFQFPN48
STM32F101x8
7 × 7 mm
STM32F101C8,
STM32F101R8
STM32F101V8,
STM32F101T8
STM32F101RB,
STM32F101VB,
STM32F101CB
STM32F101TB
Part number
LQFP64
10 x 10 mm
VFQFPN36
6 × 6 mm
www.st.com
1/87
1

Related parts for STM32F101V8T6

STM32F101V8T6 Summary of contents

Page 1

Medium-density access line, ARM-based 32-bit MCU with 64 or 128 KB Flash, 6 timers, ADC and 7 communication interfaces Features ■ Core: ARM 32-bit Cortex™-M3 CPU – 36 MHz maximum frequency, 1.25 DMIPS/MHz (Dhrystone 2.1) performance at 0 wait state ...

Page 2

Contents Contents 1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...

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STM32F101x8, STM32F101xB 4 Memory mapping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...

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Contents 7 Ordering information scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 79 8 Revision ...

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STM32F101x8, STM32F101xB List of tables Table 1. Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...

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List of tables Table 44. ADC accuracy - limited test conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...

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STM32F101x8, STM32F101xB List of figures Figure 1. STM32F101xx medium-density access line block diagram . . . . . . . . . . . . . . . . . . . . . . . . 12 Figure 2. ...

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List of figures Figure 43. LQFP64 – mm, 64 pin low-profile quad flat package outline . . . . . . . . . . . . . . . . . 75 Figure 44. Recommended footprint ...

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... This datasheet provides the ordering information and mechanical device characteristics of the STM32F101x8 and STM32F101xB medium-density access line microcontrollers. For more details on the whole STMicroelectronics STM32F101xx family, please refer to Section 2.2: Full compatibility throughout the The medium-density STM32F101xx datasheet should be read in conjunction with the low-, medium- and high-density STM32F10xxx reference manual ...

Page 10

Description 2 Description The STM32F101xB and STM32F101x8 medium-density access line family incorporates the high-performance ARM Cortex™-M3 32-bit RISC core operating MHz frequency, high-speed embedded memories (Flash memory up to 128 Kbytes and SRAM Kbytes), ...

Page 11

STM32F101x8, STM32F101xB 2.1 Device overview Figure 1 shows the general block diagram of the device family. Table 2. Device features and peripheral counts (STM32F101xx medium-density access line) Peripheral Flash - Kbytes SRAM - Kbytes General -purpose SPI ...

Page 12

Description Figure 1. STM32F101xx medium-density access line block diagram TRACECLK TRACED[0: JNTRST JTDI JTCK/SWCLK JTMS/SWDIO JTDO as AF NRST VDDA VSSA 80AF PA[ 15:0] PB[ 15:0] PC[15:0] PD[15:0] PE[15:0] MOSI,MISO, SCK,NSS as AF RX,TX, CTS, RTS, Smart Card ...

Page 13

STM32F101x8, STM32F101xB Figure 2. Clock tree HSI RC OSC_OUT 4-16 MHz HSE OSC OSC_IN OSC32_IN LSE OSC 32.768 kHz OSC32_OUT Main Clock Output MCO 1. When the HSI is used as a PLL clock input, the maximum system clock frequency ...

Page 14

Description 2.2 Full compatibility throughout the family The STM32F101xx is a complete family whose members are fully pin-to-pin, software and feature compatible. In the reference manual, the STM32F101x4 and STM32F101x6 are referred to as low-density devices, the STM32F101x8 and STM32F101xB ...

Page 15

STM32F101x8, STM32F101xB 2.3 Overview ® 2.3.1 ARM Cortex™-M3 core with embedded Flash and SRAM The ARM Cortex™-M3 processor is the latest generation of ARM processors for embedded systems. It has been developed to provide a low-cost platform that meets the ...

Page 16

Description 2.3.6 External interrupt/event controller (EXTI) The external interrupt/event controller consists of 19 edge detector lines used to generate interrupt/event requests. Each line can be independently configured to select the trigger event (rising edge, falling edge, both) and can be ...

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STM32F101x8, STM32F101xB than the V threshold. The interrupt service routine can then generate a warning PVD message and/or put the MCU into a safe state. The PVD is enabled by software. Refer to Table 10: Embedded reset and power control ...

Page 18

Description Each channel is connected to dedicated hardware DMA requests, with support for software trigger on each channel. Configuration is made by software and transfer sizes between source and destination are independent. The DMA can be used with the main ...

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STM32F101x8, STM32F101xB capture, output compare, PWM or one pulse mode output. This gives input captures / output compares / PWMs on the largest packages. The general-purpose timers can work together via the Timer Link feature for synchronization ...

Page 20

Description An analog watchdog feature allows very precise monitoring of the converted voltage of one, some or all selected channels. An interrupt is generated when the converted voltage is outside the programmed thresholds. 2.3.24 Temperature sensor The temperature sensor has ...

Page 21

STM32F101x8, STM32F101xB 3 Pinouts and pin description Figure 3. STM32F101xx medium-density access line LQFP100 pinout VBAT PC13-TAMPER-RTC PC14-OSC32_IN PC15-OSC32_OUT VSS_5 VDD_5 OSC_IN OSC_OUT NRST VSSA VREF- VREF+ VDDA PA0-WKUP PE2 1 PE3 2 PE4 3 PE5 4 PE6 5 6 ...

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Pinouts and pin description Figure 4. STM32F101xx medium-density access line LQFP64 pinout PC13-TAMPER-RTC PC15-OSC32_OUT Figure 5. STM32F101xx medium-density access line LQFP48 pinout PC13-TAMPER-RTC PC15-OSC32_OUT 22/ ...

Page 23

STM32F101x8, STM32F101xB Figure 6. STM32F101xx medium-density access line VFQPFN48 pinout PC13-TAMPER-RTC PC14-OSC32_IN PC15-OSC32_OUT PD1-OSC_OUT Figure 7. STM32F101xx medium-density access line VFQPFN36 pinout OSC_IN/PD0 OSC_OUT/PD1 PA0-WKUP VBAT 1 2 ...

Page 24

Pinouts and pin description Table 4. Medium-density STM32F101xx pin definitions Pins Pin name - - 1 - PE2 - - 2 - PE3 - - 3 - PE4 - - 4 - PE5 - - 5 - PE6 1 1 ...

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STM32F101x8, STM32F101xB Table 4. Medium-density STM32F101xx pin definitions (continued) Pins Pin name - DD_4 PA4 PA5 PA6 PA7 - 24 ...

Page 26

Pinouts and pin description Table 4. Medium-density STM32F101xx pin definitions (continued) Pins Pin name - - 55 - PD8 - - 56 - PD9 - - 57 - PD10 - - 58 - PD11 - - 59 - PD12 - ...

Page 27

... The use of PD0 and PD1 in output mode is limited as they can only be used at 50 MHz in output mode. 8. This alternate function can be remapped by software to some other port pins (if available on the used package). For more details, refer to the Alternate function I/O and debug configuration section in the STM32F10xxx reference manual, available from the STMicroelectronics website: www.st.com. Main (3) ...

Page 28

Memory mapping 4 Memory mapping The memory map is shown in Figure 8. Memory map 0xFFFF FFFF 7 0xE010 0000 Cortex-M3 internal 0xE000 0000 6 0xC000 0000 5 0xA000 0000 4 0x8000 0000 3 0x6000 0000 2 Peripherals 0x4000 0000 ...

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STM32F101x8, STM32F101xB 5 Electrical characteristics 5.1 Parameter conditions Unless otherwise specified, all voltages are referenced to V 5.1.1 Minimum and maximum values Unless otherwise specified the minimum and maximum values are guaranteed in the worst conditions of ambient temperature, supply ...

Page 30

Electrical characteristics Figure 9. Pin loading conditions 5.1.6 Power supply scheme Figure 11. Power supply scheme 1.8-3.6V 5 × 100 × 4.7 µ µF + ...

Page 31

STM32F101x8, STM32F101xB 5.1.7 Current consumption measurement Figure 12. Current consumption measurement scheme 5.2 Absolute maximum ratings Stresses above the absolute maximum ratings listed in Table 6: Current characteristics, and damage to the device. These are stress ratings only and functional ...

Page 32

Electrical characteristics Table 6. Current characteristics Symbol I Total current into V VDD I Total current out of V VSS Output current sunk by any I/O and control pin I IO Output current source by any I/Os and control pin ...

Page 33

STM32F101x8, STM32F101xB Table 8. General operating conditions (continued) Symbol Power dissipation °C T Ambient temperature A T Junction temperature range J 1. When the ADC is used, refer recommended to power ...

Page 34

Electrical characteristics . Table 10. Embedded reset and power control block characteristics Symbol Programmable voltage V PVD detector level selection (2) V PVD hysteresis PVDhyst Power on/power down V POR/PDR reset threshold (2) V PDR hysteresis PDRhyst (2) t Reset ...

Page 35

STM32F101x8, STM32F101xB 5.3.4 Embedded reference voltage The parameters given in temperature and V Table 11. Embedded internal reference voltage Symbol V Internal reference voltage REFINT ADC sampling time when reading (1) T S_vrefint the internal reference voltage Internal reference voltage ...

Page 36

Electrical characteristics Table 12. Maximum current consumption in Run mode, code with data processing running from Flash Symbol Parameter Supply current Run mode 1. Based on characterization, not tested in production. 2. External clock is 8 MHz ...

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STM32F101x8, STM32F101xB Figure 13. Typical current consumption in Run mode versus frequency (at 3 code with data processing running from RAM, peripherals enabled Figure 14. Typical current consumption in Run mode versus ...

Page 38

Electrical characteristics Table 14. Maximum current consumption in Sleep mode, code running from Flash or RAM Symbol Parameter Supply current Sleep mode 1. Based on characterization, tested in production External clock is 8 MHz ...

Page 39

STM32F101x8, STM32F101xB Figure 15. Typical current consumption values BAT 2.5 2 1.5 1 0.5 0 Figure 16. Typical current consumption in Stop mode with regulator in Run mode versus temperature at V 140 120 100 80 60 ...

Page 40

Electrical characteristics Figure 17. Typical current consumption in Stop mode with regulator in Low-power mode versus temperature at V 100 –45 °C Figure 18. Typical current consumption in Standby mode ...

Page 41

STM32F101x8, STM32F101xB Typical current consumption The MCU is placed under the following conditions: ● All I/O pins are in input mode with a static value at V ● All peripherals are disabled except explicitly mentioned ● The ...

Page 42

Electrical characteristics Table 17. Typical current consumption in Sleep mode, code running from Flash or RAM Symbol Parameter Supply I current in DD Sleep mode 1. Typical values are measures Add an additional power consumption of 0.8 ...

Page 43

STM32F101x8, STM32F101xB On-chip peripheral current consumption The current consumption of the on-chip peripherals is given in under the following conditions: ● all I/O pins are in input mode with a static value at V ● all peripherals are disabled unless ...

Page 44

Electrical characteristics Table 19. High-speed external user clock characteristics Symbol User external clock source f HSE_ext frequency V OSC_IN input pin high level voltage HSEH V OSC_IN input pin low level voltage HSEL t w(HSE) OSC_IN high or low time ...

Page 45

STM32F101x8, STM32F101xB Figure 19. High-speed external clock source AC timing diagram V HSEH 90% 10% V HSEL t r(HSE) External clock source Figure 20. Low-speed external clock source AC timing diagram V LSEH 90% 10% V LSEL t r(LSE) External ...

Page 46

Electrical characteristics Table 21. HSE 4-16 MHz oscillator characteristics Symbol f Oscillator frequency OSC_IN R Feedback resistor F Recommended load capacitance C versus equivalent serial resistance of the crystal (R i HSE driving current 2 g Oscillator transconductance m (4) ...

Page 47

STM32F101x8, STM32F101xB resonator manufacturer for more details on the resonator characteristics (frequency, package, accuracy). Table 22. LSE oscillator characteristics (f Symbol Parameter R Feedback resistor F Recommended load capacitance C versus equivalent serial resistance of the crystal (R I LSE ...

Page 48

Electrical characteristics Figure 22. Typical application with a 32.768 kHz crystal Resonator with integrated capacitors 5.3.7 Internal clock source characteristics The parameters given in temperature and V High-speed internal (HSI) RC oscillator Table 23. HSI oscillator ...

Page 49

STM32F101x8, STM32F101xB Low-speed internal (LSI) RC oscillator Table 24. LSI oscillator characteristics Symbol (2) f Frequency LSI (3) t LSI oscillator startup time su(LSI) (3) I LSI oscillator power consumption DD(LSI –40 to ...

Page 50

Electrical characteristics Table 26. PLL characteristics Symbol t PLL lock time LOCK Jitter Cycle-to-cycle jitter 1. Based on device characterization, not tested in production. 2. Take care of using the appropriate multiplier factors have PLL input clock ...

Page 51

STM32F101x8, STM32F101xB Functional EMS (Electromagnetic susceptibility) While a simple application is executed on the device (toggling 2 LEDs through I/O ports). the device is stressed by two electromagnetic events until a failure occurs. The failure is indicated by the LEDs: ...

Page 52

Electrical characteristics Electromagnetic Interference (EMI) The electromagnetic field emitted by the device is monitored while a simple application is executed (toggling 2 LEDs through the I/O ports). This emission test is compliant with IEC61967-2 standard which specifies the test board ...

Page 53

STM32F101x8, STM32F101xB 5.3.12 I/O current injection characteristics As a general rule, current injection to the I/O pins, due to external voltage below V above V (for standard, 3 V-capable I/O pins) should be avoided during normal product DD operation. However, ...

Page 54

Electrical characteristics 5.3.13 I/O port characteristics General input/output characteristics Unless otherwise specified, the parameters given in performed under the conditions summarized in compliant. Table 34. I/O static characteristics Symbol Parameter Standard IO input low level voltage V IL (1) IO ...

Page 55

STM32F101x8, STM32F101xB All I/Os are CMOS and TTL compliant (no software configuration required). Their characteristics cover more than the strict CMOS-technology or TTL parameters. The coverage of these requirements is shown in in Figure 25 and Figure 23. Standard I/O ...

Page 56

Electrical characteristics Figure 25 tolerant I/O input characteristics - CMOS port Figure 26 tolerant I/O input characteristics - TTL port 56/87 Doc ID 13586 Rev 14 STM32F101x8, STM32F101xB ...

Page 57

STM32F101x8, STM32F101xB Output driving current The GPIOs (general-purpose inputs/outputs) can sink or source up to ±8 mA, and sink or source up to ±20 mA (with a relaxed V In the user application, the number of I/O pins which can ...

Page 58

Electrical characteristics Input/output AC characteristics The definition and values of input/output AC characteristics are given in Table 36, respectively. Unless otherwise specified, the parameters given in performed under the ambient temperature and V in Table 8. Table 36. I/O AC ...

Page 59

STM32F101x8, STM32F101xB Figure 27. I/O AC characteristics definition EXT ERNAL OUTPUT ON 50pF Maximum frequency is achieved ≤ 2/3)T and if the duty cycle is (45-55%) 5.3.14 NRST pin characteristics The NRST pin ...

Page 60

Electrical characteristics 5.3.15 TIM timer characteristics The parameters given in Refer to Section 5.3.12: I/O current injection characteristics alternate function characteristics (output compare, input capture, external clock, PWM output). Table 38. TIMx Symbol t Timer resolution time res(TIM) Timer external ...

Page 61

STM32F101x8, STM32F101xB 2 Table 39 characteristics Symbol t SCL clock low time w(SCLL) t SCL clock high time w(SCLH) t SDA setup time su(SDA) t SDA data hold time h(SDA) t r(SDA) SDA and SCL rise time t ...

Page 62

Electrical characteristics 2 Figure 29 bus AC waveforms and measurement circuit I²C bus Start SDA t f(SDA) t h(STA) SCL t w(SCLH) 1. Measurement points are done at CMOS levels: 0.3V Table 40. SCL frequency ( ...

Page 63

STM32F101x8, STM32F101xB SPI interface characteristics Unless otherwise specified, the parameters given in performed under the ambient temperature, f conditions summarized in Refer to Section 5.3.12: I/O current injection characteristics input/output alternate function characteristics (NSS, SCK, MOSI, MISO). Table 41. SPI ...

Page 64

Electrical characteristics Figure 30. SPI timing diagram - slave mode and CPHA = 0 NSS input t SU(NSS) CPHA= 0 CPOL=0 t w(SCKH) CPHA w(SCKL) CPOL=1 t a(SO) MISO OUT su(SI) MOSI I NPUT Figure ...

Page 65

STM32F101x8, STM32F101xB Figure 32. SPI timing diagram - master mode High NSS input CPHA= 0 CPOL=0 CPHA= 0 CPOL=1 CPHA=1 CPOL=0 CPHA=1 CPOL=1 t su(MI) MISO INP UT MOSI OUTUT 1. Measurement points are done at CMOS levels: 0.3V (1) ...

Page 66

Electrical characteristics 5.3.17 12-bit ADC characteristics Unless otherwise specified, the parameters given in performed under the ambient temperature, f conditions summarized in Note recommended to perform a calibration after each power-up. Table 42. ADC characteristics Symbol Parameter V ...

Page 67

STM32F101x8, STM32F101xB Equation 1: R AIN < R ------------------------------------------------------------- - R AIN × ADC The formula above error below 1/4 of LSB. Here (from 12-bit resolution). Table 43. R AIN T (cycles) s 1.5 7.5 ...

Page 68

Electrical characteristics Table 45. ADC accuracy Symbol ET Total unadjusted error EO Offset error EG Gain error ED Differential linearity error EL Integral linearity error 1. ADC DC accuracy values are measured after internal calibration. 2. Better performance could be ...

Page 69

STM32F101x8, STM32F101xB Figure 34. Typical connection diagram using the ADC R AIN (1) V AIN 1. Refer to Table represents the capacitance of the PCB (dependent on soldering and PCB layout quality) plus the parasitic pad capacitance ...

Page 70

Electrical characteristics Figure 36. Power supply and reference decoupling ( and V REF+ REF- 5.3.18 Temperature sensor characteristics Table 46. TS characteristics Symbol ( (1) Avg_Slope ( (2) t START (3)(2) T S_temp 1. ...

Page 71

STM32F101x8, STM32F101xB 6 Package characteristics 6.1 Package mechanical data In order to meet environmental requirements, ST offers these devices in different grades of ® ECOPACK packages, depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product status ...

Page 72

Package characteristics Figure 37. VFQFPN48 mm, 0.5 mm pitch, package (1) outline Seating Plane Bottom View D2 1. Drawing is not to scale. 2. All leads/pads should also be ...

Page 73

STM32F101x8, STM32F101xB Figure 39. VFQFPN36 mm, 0.5 mm pitch, package (1) outline Seating plane Pin # 0.20 1. Drawing is not to ...

Page 74

Package characteristics Figure 41. LQFP100 mm, 100-pin low-profile quad flat package outline 100 26 Pin identification e 1. Drawing is not to scale. 2. Dimensions are in ...

Page 75

STM32F101x8, STM32F101xB Figure 43. LQFP64 – mm, 64 pin low-profile quad flat package outline Drawing is not to scale. 2. Dimensions are in millimeters. Table 50. LQFP64 – mm, ...

Page 76

Package characteristics Figure 45. LQFP48 – 7mm, 48-pin low-profile quad flat package outline Seating plane ccc Pin 1 1 identification 1. Drawing is not to scale. ...

Page 77

STM32F101x8, STM32F101xB 6.2 Thermal characteristics The maximum chip junction temperature (T Table 8: General operating conditions on page The maximum chip-junction temperature, T using the following equation: Where: max is the maximum ambient temperature in °C, ● Θ ...

Page 78

Package characteristics 6.2.2 Evaluating the maximum junction temperature for an application When ordering the microcontroller, the temperature range is specified in the ordering information scheme shown in Each temperature range suffix corresponds to a specific guaranteed ambient temperature at maximum ...

Page 79

STM32F101x8, STM32F101xB 7 Ordering information scheme Table 53. Ordering information scheme Example: Device family STM32 = ARM-based 32-bit microcontroller Product type F = general-purpose Device subfamily 101 = access line Pin count pins pins ...

Page 80

Revision history 8 Revision history Table 54. Document revision history Date Revision 06-Jun-2007 20-Jul-07 80/87 1 First draft. I values modified in Table 11: Maximum current consumption in Run DD and Sleep modes ( range modified in ...

Page 81

STM32F101x8, STM32F101xB Table 54. Document revision history (continued) Date Revision 18-Oct-2007 V value added to ESD(CDM) Note added below Table 10: Embedded reset and power control block characteristics. and below characteristics. Note added below Table 35: Output voltage characteristics parameter ...

Page 82

Revision history Table 54. Document revision history (continued) Date Revision 22-Nov-2007 82/87 Document status promoted from preliminary data to datasheet. Small text changes. STM32F101CB part number corrected in Number of communication peripherals corrected for STM32F101Tx in Table 2: Device features ...

Page 83

STM32F101x8, STM32F101xB Table 54. Document revision history (continued) Date Revision 14-Mar-2008 21-Mar-2008 22-May-2008 Figure 2: Clock tree on page 13 CRC added (see CRC (cyclic redundancy check) calculation unit on page 9 and Figure 8: Memory map on page 28 ...

Page 84

Revision history Table 54. Document revision history (continued) Date Revision 21-Jul-2008 24-Jul-2008 23-Sep-2008 84/87 Small text changes. Power supply supervisor on page 16 Table 8: General operating conditions on page Capacitance modified in Figure 11: Power supply scheme on page ...

Page 85

STM32F101x8, STM32F101xB Table 54. Document revision history (continued) Date Revision 21-Apr-2009 22-Sep-2009 I/O information clarified on page In Table 4: Medium-density STM32F101xx pin PB14, PB15, PB3/TRACESWO moved from Default column to Remap column. Note modified in Table 12: Maximum current ...

Page 86

Revision history Table 54. Document revision history (continued) Date Revision 20-May-2010 19-Apr-2011 86/87 Added STM32F101TB devices. Added VFQFPN48 package. Updated note 2 below Table 39: I2C characteristics 13 Updated Figure 29: I2C bus AC waveforms and measurement circuit(1) Updated Figure ...

Page 87

... STM32F101x8, STM32F101xB Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST’s terms and conditions of sale. ...

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