MCU ARM 64KB FLASH/TIMER 100LQFP

STM32F101V8T6

Manufacturer Part NumberSTM32F101V8T6
DescriptionMCU ARM 64KB FLASH/TIMER 100LQFP
ManufacturerSTMicroelectronics
SeriesSTM32
STM32F101V8T6 datasheet
 

Specifications of STM32F101V8T6

Core ProcessorARM® Cortex-M3™Core Size32-Bit
Speed36MHzConnectivityI²C, IrDA, LIN, SPI, UART/USART
PeripheralsDMA, PDR, POR, PVD, PWM, Temp Sensor, WDTNumber Of I /o80
Program Memory Size64KB (64K x 8)Program Memory TypeFLASH
Ram Size10K x 8Voltage - Supply (vcc/vdd)2 V ~ 3.6 V
Data ConvertersA/D 16x12bOscillator TypeInternal
Operating Temperature-40°C ~ 85°CPackage / Case100-LQFP
Processor SeriesSTM32F101xCoreARM Cortex M3
Data Bus Width32 bitData Ram Size10 KB
Interface TypeI2C, SPI, USARTMaximum Clock Frequency36 MHz
Number Of Programmable I/os100Number Of Timers3 x 16 bit
Operating Supply Voltage2 V to 3.6 VMaximum Operating Temperature+ 85 C
Mounting StyleSMD/SMT3rd Party Development ToolsEWARM, EWARM-BL, MDK-ARM, RL-ARM, ULINK2
Minimum Operating Temperature- 40 COn-chip Adc12 bit, 16 Channel
For Use With497-10030 - STARTER KIT FOR STM32497-8853 - BOARD DEMO STM32 UNIV USB-UUSCIKSDKSTM32-PL - KIT IAR KICKSTART STM32 CORTEXM3497-8512 - KIT STARTER FOR STM32F10XE MCU497-8505 - KIT STARTER FOR STM32F10XE MCU497-8304 - KIT STM32 MOTOR DRIVER BLDC497-6438 - BOARD EVALUTION FOR STM32 512K497-6289 - KIT PERFORMANCE STICK FOR STM32MCBSTM32UME - BOARD EVAL MCBSTM32 + ULINK-MEMCBSTM32U - BOARD EVAL MCBSTM32 + ULINK2497-6053 - KIT STARTER FOR STM32497-6052 - KIT STARTER FOR STM32497-6050 - KIT STARTER FOR STM32497-6049 - KIT EVALUATION LOW COST STM32497-6048 - BOARD EVALUATION FOR STM32497-6047 - KIT DEVELOPMENT FOR STM32497-5046 - KIT TOOL FOR ST7/UPSD/STR7 MCULead Free Status / RoHS StatusLead free / RoHS Compliant
Eeprom Size-Other names497-6060
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STM32F101x8, STM32F101xB
Figure 27. I/O AC characteristics definition
EXT ERNAL
OUTPUT
ON 50pF
Maximum frequency is achieved if (t r + t f ) ≤ 2/3)T and if the duty cycle is (45-55%)
5.3.14
NRST pin characteristics
The NRST pin input driver uses CMOS technology. It is connected to a permanent pull-up
resistor, R
(see
PU
Unless otherwise specified, the parameters given in
performed under the ambient temperature and V
in
Table
8.
Table 37.
NRST pin characteristics
Symbol
(1)
V
NRST Input low level voltage
IL(NRST)
(1)
V
NRST Input high level voltage
IH(NRST)
NRST Schmitt trigger voltage
V
hys(NRST)
hysteresis
R
Weak pull-up equivalent resistor
PU
(1)
V
NRST Input filtered pulse
F(NRST)
(1)
V
NRST Input not filtered pulse
NF(NRST)
1. Guaranteed by design, not tested in production.
2. The pull-up is designed with a true resistance in series with a switchable PMOS. This PMOS contribution
the series resistance must be minimum
Figure 28. Recommended NRST pin protection
External
reset circuit
1. The reset network protects the device against parasitic resets.
2. The user must ensure that the level on the NRST pin can go below the V
Table
37. Otherwise the reset will not be taken into account by the device.
90%
50%
10%
t r(I O)out
when loaded by 50pF
Table
34).
Parameter
Conditions
(2)
V
.
(~10% order)
V DD
(1)
R PU
(2)
NRST
0.1 µF
Doc ID 13586 Rev 14
Electrical characteristics
10%
50%
90%
t r(I O)out
T
Table 37
are derived from tests
supply voltage conditions summarized
DD
Min
Typ
Max
–0.5
2
V
DD
200
=
V
30
40
IN
SS
300
Internal reset
Filter
STM32F10x
ai14132d
max level specified in
IL(NRST)
ai14131
Unit
0.8
V
+0.5
mV
50
100
ns
ns
to
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