MCU ARM 64KB FLASH/TIMER 100LQFP

STM32F101V8T6

Manufacturer Part NumberSTM32F101V8T6
DescriptionMCU ARM 64KB FLASH/TIMER 100LQFP
ManufacturerSTMicroelectronics
SeriesSTM32
STM32F101V8T6 datasheet
 


Specifications of STM32F101V8T6

Core ProcessorARM® Cortex-M3™Core Size32-Bit
Speed36MHzConnectivityI²C, IrDA, LIN, SPI, UART/USART
PeripheralsDMA, PDR, POR, PVD, PWM, Temp Sensor, WDTNumber Of I /o80
Program Memory Size64KB (64K x 8)Program Memory TypeFLASH
Ram Size10K x 8Voltage - Supply (vcc/vdd)2 V ~ 3.6 V
Data ConvertersA/D 16x12bOscillator TypeInternal
Operating Temperature-40°C ~ 85°CPackage / Case100-LQFP
Processor SeriesSTM32F101xCoreARM Cortex M3
Data Bus Width32 bitData Ram Size10 KB
Interface TypeI2C, SPI, USARTMaximum Clock Frequency36 MHz
Number Of Programmable I/os100Number Of Timers3 x 16 bit
Operating Supply Voltage2 V to 3.6 VMaximum Operating Temperature+ 85 C
Mounting StyleSMD/SMT3rd Party Development ToolsEWARM, EWARM-BL, MDK-ARM, RL-ARM, ULINK2
Minimum Operating Temperature- 40 COn-chip Adc12 bit, 16 Channel
For Use With497-10030 - STARTER KIT FOR STM32497-8853 - BOARD DEMO STM32 UNIV USB-UUSCIKSDKSTM32-PL - KIT IAR KICKSTART STM32 CORTEXM3497-8512 - KIT STARTER FOR STM32F10XE MCU497-8505 - KIT STARTER FOR STM32F10XE MCU497-8304 - KIT STM32 MOTOR DRIVER BLDC497-6438 - BOARD EVALUTION FOR STM32 512K497-6289 - KIT PERFORMANCE STICK FOR STM32MCBSTM32UME - BOARD EVAL MCBSTM32 + ULINK-MEMCBSTM32U - BOARD EVAL MCBSTM32 + ULINK2497-6053 - KIT STARTER FOR STM32497-6052 - KIT STARTER FOR STM32497-6050 - KIT STARTER FOR STM32497-6049 - KIT EVALUATION LOW COST STM32497-6048 - BOARD EVALUATION FOR STM32497-6047 - KIT DEVELOPMENT FOR STM32497-5046 - KIT TOOL FOR ST7/UPSD/STR7 MCULead Free Status / RoHS StatusLead free / RoHS Compliant
Eeprom Size-Other names497-6060
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Page 82/87

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Revision history
Table 54.
Document revision history (continued)
Date
Revision
22-Nov-2007
82/87
Document status promoted from preliminary data to datasheet. Small
text changes.
STM32F101CB part number corrected in
Number of communication peripherals corrected for STM32F101Tx in
Table 2: Device features and peripheral counts (STM32F101xx medium-
density access line)
and Number of GPIOs corrected for LQFP package.
Power supply schemes on page 16
Main function and default alternate function modified for PC14 and PC15
in
Table 4: Medium-density STM32F101xx pin
Remap column added.
Figure 11: Power supply scheme
and
Note 1
modified in
Table 5: Voltage
in
Table 6: Current
characteristics.
Note 2
added in
Table 10: Embedded reset and power control block
characteristics.
48 and 72 MHz frequencies removed from
Table
14. MCU ‘s operating conditions modified in
consumption on page
41.
I
typical value at 2.4 V modified and I
DD_VBAT
added in
Table 15: Typical and maximum current consumptions in Stop
and Standby
modes. Note added in
on page
42.
Table 18: Peripheral current consumption
Figure 17: Typical current consumption in Stop mode with regulator in
4
Low-power mode versus temperature at VDD = 3.3 V and 3.6 V
Note removed below
Figure 30: SPI timing diagram - slave mode and
CPHA =
0. Note added below
mode and CPHA =
1(1).
Figure 34: Typical connection diagram using the ADC
t
and t
conditions modified in
SU(HSE)
SU(LSE)
respectively. Maximum values removed from
wakeup
timings. t
conditions modified in
RET
endurance and data
retention. Conditions modified in
characteristics.
Impedance size specified in
page
71. Small text changes in
Section 5.3.11: Absolute maximum ratings (electrical sensitivity)
updated.
Details on unused pins removed from
characteristics on page
54.
Table 41: SPI characteristics
Table 42: ADC
characteristics. Note added in
Note 3
and
Note 2
added below
conditions. Avg_Slope and V
Θ
value for VFQFPN36 package added in
JA
characteristics.
I2C interface characteristics on page 60
Order codes replaced by
Section 7: Ordering information
Doc ID 13586 Rev 14
STM32F101x8, STM32F101xB
Changes
Table 1: Device
summary.
modified.
definitions,
Note 6
− V
modified. V
ratings modified
DD
SS
characteristics.
Note 1
Table
12,
Table 13
Typical current
maximum value
DD_VBAT
Table 16 on page 41
and
modified.
Figure 31: SPI timing diagram - slave
modified.
Table 21
and
Table
Table 25: Low-power mode
Table 28: Flash memory
Table 29: EMS
A.4: Voltage glitch on ADC input 0 on
Table 35: Output voltage
characteristics.
General input/output
updated. Notes added and I
removed in
lkg
Table 43
and
Table
Table 44: ADC accuracy - limited test
modified in
Table 46: TS
characteristics.
25
Table 52: Package thermal
modified.
scheme.
added,
modified
and
Table 17
added.
22,
46.