STM32F101V8T6 STMicroelectronics, STM32F101V8T6 Datasheet - Page 64

MCU ARM 64KB FLASH/TIMER 100LQFP

STM32F101V8T6

Manufacturer Part Number
STM32F101V8T6
Description
MCU ARM 64KB FLASH/TIMER 100LQFP
Manufacturer
STMicroelectronics
Series
STM32r
Datasheet

Specifications of STM32F101V8T6

Core Processor
ARM® Cortex-M3™
Core Size
32-Bit
Speed
36MHz
Connectivity
I²C, IrDA, LIN, SPI, UART/USART
Peripherals
DMA, PDR, POR, PVD, PWM, Temp Sensor, WDT
Number Of I /o
80
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
10K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Data Converters
A/D 16x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-LQFP
Processor Series
STM32F101x
Core
ARM Cortex M3
Data Bus Width
32 bit
Data Ram Size
10 KB
Interface Type
I2C, SPI, USART
Maximum Clock Frequency
36 MHz
Number Of Programmable I/os
100
Number Of Timers
3 x 16 bit
Operating Supply Voltage
2 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWARM, EWARM-BL, MDK-ARM, RL-ARM, ULINK2
Minimum Operating Temperature
- 40 C
On-chip Adc
12 bit, 16 Channel
For Use With
497-10030 - STARTER KIT FOR STM32497-8853 - BOARD DEMO STM32 UNIV USB-UUSCIKSDKSTM32-PL - KIT IAR KICKSTART STM32 CORTEXM3497-8512 - KIT STARTER FOR STM32F10XE MCU497-8505 - KIT STARTER FOR STM32F10XE MCU497-8304 - KIT STM32 MOTOR DRIVER BLDC497-6438 - BOARD EVALUTION FOR STM32 512K497-6289 - KIT PERFORMANCE STICK FOR STM32MCBSTM32UME - BOARD EVAL MCBSTM32 + ULINK-MEMCBSTM32U - BOARD EVAL MCBSTM32 + ULINK2497-6053 - KIT STARTER FOR STM32497-6052 - KIT STARTER FOR STM32497-6050 - KIT STARTER FOR STM32497-6049 - KIT EVALUATION LOW COST STM32497-6048 - BOARD EVALUATION FOR STM32497-6047 - KIT DEVELOPMENT FOR STM32497-5046 - KIT TOOL FOR ST7/UPSD/STR7 MCU
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details
Other names
497-6060
Electrical characteristics
Figure 30. SPI timing diagram - slave mode and CPHA = 0
NSS input
t SU(NSS)
CPHA= 0
CPOL=0
t w(SCKH)
CPHA= 0
t w(SCKL)
CPOL=1
t a(SO)
MISO
OUT P UT
t su(SI)
MOSI
I NPUT
Figure 31. SPI timing diagram - slave mode and CPHA = 1
NSS input
t SU(NSS)
CPHA=1
CPOL=0
t w(SCKH)
CPHA=1
t w(SCKL)
CPOL=1
t a(SO)
MISO
OUT P UT
t su(SI)
MOSI
I NPUT
1. Measurement points are done at CMOS levels: 0.3V
64/87
t c(SCK)
t v(SO)
t h(SO)
MS B O UT
BI T6 OUT
M SB IN
B I T1 IN
t h(SI)
t c(SCK)
t v(SO)
MS B O UT
BI T6 OUT
t h(SI)
M SB IN
B I T1 IN
and 0.7V
.
DD
DD
Doc ID 13586 Rev 14
STM32F101x8, STM32F101xB
t h(NSS)
t r(SCK)
t dis(SO)
t f(SCK)
LSB OUT
LSB IN
(1)
t h(NSS)
t r(SCK)
t h(SO)
t dis(SO)
t f(SCK)
LSB OUT
LSB IN
ai14134c
ai14135

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