MCU ARM 64KB FLASH/TIMER 100LQFP

STM32F101V8T6

Manufacturer Part NumberSTM32F101V8T6
DescriptionMCU ARM 64KB FLASH/TIMER 100LQFP
ManufacturerSTMicroelectronics
SeriesSTM32
STM32F101V8T6 datasheet
 


Specifications of STM32F101V8T6

Core ProcessorARM® Cortex-M3™Core Size32-Bit
Speed36MHzConnectivityI²C, IrDA, LIN, SPI, UART/USART
PeripheralsDMA, PDR, POR, PVD, PWM, Temp Sensor, WDTNumber Of I /o80
Program Memory Size64KB (64K x 8)Program Memory TypeFLASH
Ram Size10K x 8Voltage - Supply (vcc/vdd)2 V ~ 3.6 V
Data ConvertersA/D 16x12bOscillator TypeInternal
Operating Temperature-40°C ~ 85°CPackage / Case100-LQFP
Processor SeriesSTM32F101xCoreARM Cortex M3
Data Bus Width32 bitData Ram Size10 KB
Interface TypeI2C, SPI, USARTMaximum Clock Frequency36 MHz
Number Of Programmable I/os100Number Of Timers3 x 16 bit
Operating Supply Voltage2 V to 3.6 VMaximum Operating Temperature+ 85 C
Mounting StyleSMD/SMT3rd Party Development ToolsEWARM, EWARM-BL, MDK-ARM, RL-ARM, ULINK2
Minimum Operating Temperature- 40 COn-chip Adc12 bit, 16 Channel
For Use With497-10030 - STARTER KIT FOR STM32497-8853 - BOARD DEMO STM32 UNIV USB-UUSCIKSDKSTM32-PL - KIT IAR KICKSTART STM32 CORTEXM3497-8512 - KIT STARTER FOR STM32F10XE MCU497-8505 - KIT STARTER FOR STM32F10XE MCU497-8304 - KIT STM32 MOTOR DRIVER BLDC497-6438 - BOARD EVALUTION FOR STM32 512K497-6289 - KIT PERFORMANCE STICK FOR STM32MCBSTM32UME - BOARD EVAL MCBSTM32 + ULINK-MEMCBSTM32U - BOARD EVAL MCBSTM32 + ULINK2497-6053 - KIT STARTER FOR STM32497-6052 - KIT STARTER FOR STM32497-6050 - KIT STARTER FOR STM32497-6049 - KIT EVALUATION LOW COST STM32497-6048 - BOARD EVALUATION FOR STM32497-6047 - KIT DEVELOPMENT FOR STM32497-5046 - KIT TOOL FOR ST7/UPSD/STR7 MCULead Free Status / RoHS StatusLead free / RoHS Compliant
Eeprom Size-Other names497-6060
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Page 13/87

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STM32F101x8, STM32F101xB
Figure 2.
Clock tree
HSI RC
OSC_OUT
4-16 MHz
HSE OSC
OSC_IN
OSC32_IN
LSE OSC
32.768 kHz
OSC32_OUT
Main
Clock Output
MCO
1. When the HSI is used as a PLL clock input, the maximum system clock frequency that can be achieved is
36 MHz.
2. To have an ADC conversion time of 1 µs, APB2 must be at 14 MHz or 28 MHz.
8 MHz
HSI
/2
SW
PLLSRC
PLLMUL
HSI
SYSCLK
..., x16
x2, x3, x4
PLLCLK
36 MHz
PLL
max
HSE
CSS
PLLXTPRE
/2
/128
to RTC
LSE
RTCCLK
RTCSEL[1:0]
to Independent Watchdog (IWDG)
LSI RC
LSI
40 kHz
IWDGCLK
/2
PLLCLK
HSI
HSE
SYSCLK
MCO
Doc ID 13586 Rev 14
FLITFCLK
to Flash programming interface
HCLK
36 MHz max
to AHB bus, core,
memory and DMA
Clock
Enable (3 bits)
to Cortex System timer
/8
FCLK Cortex
free running clock
AHB
APB1
36 MHz max
Prescaler
Prescaler
/1, 2..512
/1, 2, 4, 8, 16
Peripheral Clock
Enable (13 bits)
TIM2,3, 4
If (APB1 prescaler =1) x1
else
x2
Peripheral Clock
Enable (3 bits)
APB2
36 MHz max
Prescaler
/1, 2, 4, 8, 16
Peripheral Clock
Enable (11 bits)
ADC
Prescaler
/2, 4, 6, 8
Legend:
HSE = high-speed external clock signal
HSI = high-speed internal clock signal
LSI = low-speed internal clock signal
LSE = low-speed external clock signal
Description
PCLK1
to APB1
peripherals
to TIM2, 3
and 4
TIMXCLK
PCLK2
to APB2
peripherals
to ADC
ADCCLK
ai15104
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