EZ80F92AZ020EG Zilog, EZ80F92AZ020EG Datasheet - Page 119

IC ACCLAIM MCU 128KB 100LQFP

EZ80F92AZ020EG

Manufacturer Part Number
EZ80F92AZ020EG
Description
IC ACCLAIM MCU 128KB 100LQFP
Manufacturer
Zilog
Series
eZ80® Acclaim!®r
Datasheets

Specifications of EZ80F92AZ020EG

Core Processor
Z8
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, IrDA, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, WDT
Number Of I /o
24
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 105°C
Package / Case
100-LQFP
Processor Series
EZ80F92x
Core
eZ80
Data Bus Width
8 bit
Data Ram Size
8 KB
Interface Type
I2C, IrDA, SPI, UART
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
24
Number Of Timers
6
Operating Supply Voltage
3 V to 3.6 V
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
Development Tools By Supplier
eZ80F920200ZCOG
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Lead Free Status / Rohs Status
 Details
Other names
269-3871
EZ80F92AZ020EG

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
EZ80F92AZ020EG
Manufacturer:
Zilog
Quantity:
10 000
PS015313-0508
Table 54. UART Transmit Holding Registers(UART0_THR = 00C0h, UART1_THR =
UART Receive Buffer Register
The bits in this register reflect the data received. If less than eight bits are programmed for
receive, the lower bits of the byte reflect the bits received whereas upper unused bits are 0.
The receive FIFO is mapped at this address. If the FIFO is disabled, this buffer is only one
byte deep.
These registers share the same address space as the UARTx_THR and UARTx_BRG_L
registers. See
Table 55. UART Receive Buffer Registers(UART0_RBR = 00C0h, UART1_RBR =
00 D0h)
00D0h)
Bit
Reset
CPU Access
Note: W = Write only.
Bit
Position
[7:0]
T
Bit
Reset
CPU Access
Note: R = Read only.
Bit
Position
[7:0]
R
x
x
D
D
Table
Value
00h–
FFh
Value
00h–
FFh
55.
Description
Transmit data byte.
Description
Receive data byte.
W
X
X
R
7
7
W
X
X
R
6
6
W
R
X
X
5
5
Universal Asynchronous Receiver/Transmitter
W
R
X
X
4
4
W
R
X
X
3
3
Product Specification
W
R
X
X
2
2
eZ80F92/eZ80F93
W
X
X
R
1
1
W
X
X
R
0
0
112

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