EZ80F92AZ020EG Zilog, EZ80F92AZ020EG Datasheet - Page 91

• Manufacturer Part Number: EZ80F92AZ020EG
• Description: IC ACCLAIM MCU 128KB 100LQFP
• Manufacturer: Zilog
• Series: eZ80® Acclaim!®r

Specifications of EZ80F92AZ020EG

• Core Processor: Z8
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: I²C, IrDA, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, WDT
• Number Of I /o: 24
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 100-LQFP
• Processor Series: EZ80F92x
• Core: eZ80
• Data Bus Width: 8 bit
• Data Ram Size: 8 KB
• Interface Type: I2C, IrDA, SPI, UART
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 24
• Number Of Timers: 6
• Operating Supply Voltage: 3 V to 3.6 V
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: eZ80F920200ZCOG
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Details
• Other names: 269-3871; EZ80F92AZ020EG

PS015313-0508
Note:
Table 34. Timer Data Register—High Byte(TMR0_DR_H = 0082h, TMR1_DR_H =
0085h, TMR2_DR_H = 0088h, TMR3_DR_H = 008Bh, TMR4_DR_H = 008Eh, or
TMR5_DR_H = 0091h)
Timer Reload Register—Low Byte
The Timer Reload Register—Low Byte, listed in
(LSB) of the 2-byte timer reload value. In CONTINUOUS mode, the timer reload value is
reloaded into the timer upon end-of-count. When RST_EN (TMRx_CTL[1]) is set to 1 to
enable the automatic reload and restart function, the timer reload value is written to the
timer on the next rising edge of the clock.
Table 35. Timer Reload Register—Low Byte(TMR0_RR_L = 0081h, TMR1_RR_L =
0084h, TMR2_RR_L = 0087h, TMR3_RR_L = 008Ah, TMR4_RR_L = 008Dh, or
TMR5_RR_L = 0090h)
Bit
Reset
CPU Access
Note: R = Read only.
Bit
Position
[7:0]
TMRx_DR_H
Bit
Reset
CPU Access
Note: W = Write only.
Bit
Position
[7:0]
TMRx_RR_L
The Timer Data registers and Timer Reload registers share the same address
space.
Value
00h–FFh These bits represent the High byte of the 2-byte timer data
Value
00h–FFh These bits represent the Low byte of the 2-byte timer
Description
value, {TMRx_DR_H[7:0], TMRx_DR_L[7:0]}. Bit 7 is bit 15
(msb) of the 16-bit timer data value. Bit 0 is bit 8 of the 16-bit
timer data value.
W
R
7
0
7
0
Description
reload value, {TMRx_RR_H[7:0], TMRx_RR_L[7:0]}. Bit 7
is bit 7 of the 16-bit timer reload value. Bit 0 is bit 0 (lsb) of
the 16-bit timer reload value.
W
R
6
0
6
0
W
R
5
0
5
0
Table
W
R
4
0
4
0
35, stores the least-significant byte
W
R
3
0
3
0
Programmable Reload Timers
Product Specification
W
R
2
0
2
0
eZ80F92/eZ80F93
W
R
1
0
1
0
W
R
0
0
0
0
84