EZ80F92AZ020EG Zilog, EZ80F92AZ020EG Datasheet - Page 170

• Manufacturer Part Number: EZ80F92AZ020EG
• Description: IC ACCLAIM MCU 128KB 100LQFP
• Manufacturer: Zilog
• Series: eZ80® Acclaim!®r

Specifications of EZ80F92AZ020EG

• Core Processor: Z8
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: I²C, IrDA, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, WDT
• Number Of I /o: 24
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 100-LQFP
• Processor Series: EZ80F92x
• Core: eZ80
• Data Bus Width: 8 bit
• Data Ram Size: 8 KB
• Interface Type: I2C, IrDA, SPI, UART
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 24
• Number Of Timers: 6
• Operating Supply Voltage: 3 V to 3.6 V
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: eZ80F920200ZCOG
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Details
• Other names: 269-3871; EZ80F92AZ020EG

PS015313-0508
ZDI-Supported Protocol
ZDI allows reading and writing of most internal registers without disturbing the state of
the machine. Reads and writes to memory may occur as fast as the ZDI can download and
upload data, with a maximum frequency of one-half the CPU system clock frequency.
Table 92
clock.
Table 92. Recommended ZDI Clock vs. System Clock Frequency
ZDI supports a bidirectional serial protocol. The protocol defines any device that sends
data as the transmitter and any receiving device as the receiver. The device controlling the
transfer is the master and the device being controlled is the slave. The master always ini-
tiates the data transfers and provides the clock for both receive and transmit operations.
The ZDI block on the eZ80F92 device is considered a slave in all data transfers.
Figure 38
tor allows the user to connect directly to the USB Smart Cable debugger using a six-pin
header.
System Clock Frequency
3–10 MHz
8–16 MHz
12–24 MHz
20–50 MHz
Figure 38.Schematic For Building a Target Board USB Smart Cable Connector
eZ80F92
MCU
lists the recommended frequencies of the ZDI clock in relation to the system
displays the schematic for building a connector on a target board. This connec-
TCK (ZCL)
TDI (ZDA)
10 K‰
6-Pin Target Connector
10 K‰
ZDI Clock Frequency
1 MHz
2 MHz
4 MHz
8 MHz
2
4
6
1
3
5
(Target V
TV
Product Specification
DD
DD
eZ80F92/eZ80F93
)
Zilog Debug Interface
163