EZ80F92AZ020EG Zilog, EZ80F92AZ020EG Datasheet - Page 178

• Manufacturer Part Number: EZ80F92AZ020EG
• Description: IC ACCLAIM MCU 128KB 100LQFP
• Manufacturer: Zilog
• Series: eZ80® Acclaim!®r

Specifications of EZ80F92AZ020EG

• Core Processor: Z8
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: I²C, IrDA, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, WDT
• Number Of I /o: 24
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 100-LQFP
• Processor Series: EZ80F92x
• Core: eZ80
• Data Bus Width: 8 bit
• Data Ram Size: 8 KB
• Interface Type: I2C, IrDA, SPI, UART
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 24
• Number Of Timers: 6
• Operating Supply Voltage: 3 V to 3.6 V
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: eZ80F920200ZCOG
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Details
• Other names: 269-3871; EZ80F92AZ020EG

PS015313-0508
ZDI Read Only Registers
ZDI Register Definitions
Table 94
shared with ZDI Write Only registers.
Table 94. ZDI Read Only Registers
ZDI Address Match Registers
The four sets of address match registers are used for setting the addresses for generating
BREAK points. When the accompanying BRK_ADDRX bit is set in the ZDI BREAK
Control register to enable the particular address match, the current eZ80F92 address is
compared with the 3-byte address set, {ZDI_ADDRx_U, ZDI_ADDRx_H,
ZDI_ADDR_x_L}. If the CPU is operating in ADL mode, the address is supplied by
ADDR[23:0]. If the CPU is operating in Z80
{MBASE[7:0], ADDR[15:0]}. If a match is found, ZDI issues a BREAK to the eZ80F92
device placing the processor in ZDI mode pending further instructions from the ZDI inter-
face block. If the address is not the first op-code fetch, the ZDI BREAK is executed at the
end of the instruction in which it is executed. There are four sets of address match regis-
ters. They can be used in conjunction with each other to BREAK on branching instruc-
tions. See
ZDI
Address
00h
01h
02h
03h
10h
11h
12h
17h
20h
lists the ZDI Read Only registers. Many of the ZDI Read Only addresses are
Table 95
ZDI Register Name
ZDI_ID_L
ZDI_ID_H
ZDI_ID_REV
ZDI_STAT
ZDI_RD_L
ZDI_RD_H
ZDI_RD_U
ZDI_BUS_STAT
ZDI_RD_MEM
on page 172.
ZDI Register Function
eZ80
eZ80
eZ80
Status register
Read Memory Address Low Byte
register
Read Memory Address High Byte
register
Read Memory Address Upper Byte
register
Bus Status register
Read Memory Data Value
®
®
Product ID High Byte register
Product ID Revision register
mode, the address is supplied by
Product ID Low Byte register
Product Specification
eZ80F92/eZ80F93
Zilog Debug Interface
Reset
Value
07h
00h
XXh
00h
XXh
XXh
XXh
00h
XXh
171