EZ80F92AZ020EG Zilog, EZ80F92AZ020EG Datasheet - Page 87

• Manufacturer Part Number: EZ80F92AZ020EG
• Description: IC ACCLAIM MCU 128KB 100LQFP
• Manufacturer: Zilog
• Series: eZ80® Acclaim!®r

Specifications of EZ80F92AZ020EG

• Core Processor: Z8
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: I²C, IrDA, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, WDT
• Number Of I /o: 24
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 100-LQFP
• Processor Series: EZ80F92x
• Core: eZ80
• Data Bus Width: 8 bit
• Data Ram Size: 8 KB
• Interface Type: I2C, IrDA, SPI, UART
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 24
• Number Of Timers: 6
• Operating Supply Voltage: 3 V to 3.6 V
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: eZ80F920200ZCOG
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Details
• Other names: 269-3871; EZ80F92AZ020EG

eZ80F92/eZ80F93
Product Specification
80
Then, when the end-of-count value,
, is reached and PRT_IRQ is set to 1, an inter-
0000h
rupt service request signal is passed to the CPU. PRT_IRQ is cleared to 0 and the interrupt
service request signal is inactivated whenever the CPU reads from the timer control regis-
ters, TMRx_CTL.
Timer Input Source Selection
Timers 0–3 feature programmable input source selection. By default, the input is taken
from the eZ80F92 device’s system clock. Alternatively, Timers 0–3 can take their input
from port input pins PB0 (Timers 0 and 2) or PB1 (Timers 1 and 3). Timers 0–3 can also
use the Real-Time Clock source (50, 60, or 32768 Hz) as their clock sources. When the
timer clock source is the Real-Time Clock signal, the timer decrements on the second ris-
ing edge of the system clock following the falling edge of the RTC_X
pin. The input
OUT
source for these timers is set using the Timer Input Source Select register.
Event Counter
When Timers 0–3 are configured to take their inputs from port input pins PB0 and PB1,
they function as event counters. For event counting, the clock divider is bypassed. The
PRT counters decrement on every rising edge of the port pin. The port pins must be con-
figured as inputs. Due to the input sampling on the pins, the event input signal frequency is
limited to one-half the system clock frequency. Input sampling on the port pins results in
the PRT counter being updated on the fifth rising edge of the system clock after the rising
edge occurs at the port pin.
Timer Output
Two of the Programmable Reload Timers (Timers 4 and 5) can be directed to GPIO Port B
output pins (PB4 and PB5, respectively). To enable the Timer Out feature, the GPIO port
pin must be configured for alternate functions. After reset, the Timer Output feature is dis-
abled by default. The GPIO output pin toggles each time the PRT reaches its end-of-count
value. In CONTINUOUS mode operation, the disabling of the Timer Output feature
results in a Timer Output signal period that is twice the PRT time-out period. Examples of
the Timer Output operation are displayed in
Figure 23
on page 81 and listed in
Table 31
on
page 81. In these examples, the GPIO output is assumed to be Low (0) when the Timer
Output function is enabled.
PS015313-0508
Programmable Reload Timers