R5F61668RN50FPV Renesas Electronics America, R5F61668RN50FPV Datasheet - Page 1135

IC H8SX/1668 MCU FLASH 144LQFP

R5F61668RN50FPV

Manufacturer Part Number
R5F61668RN50FPV
Description
IC H8SX/1668 MCU FLASH 144LQFP
Manufacturer
Renesas Electronics America
Series
H8® H8SX/1600r
Datasheet

Specifications of R5F61668RN50FPV

Core Processor
H8SX
Core Size
16/32-Bit
Speed
50MHz
Connectivity
EBI/EMI, I²C, IrDA, SCI, SmartCard, USB
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
92
Program Memory Size
1MB (1M x 8)
Program Memory Type
FLASH
Ram Size
56K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
144-LQFP
For Use With
R0K561668S000BE - KIT STARTER FOR H8SX/1668R0K561664S001BE - KIT STARTER FOR H8SX/1651HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
R5F61668RN50FPV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
23.4
The D/A converter includes D/A conversion circuits for two channels, each of which can operate
independently. When the DAOE bit in DACR01 is set to 1, D/A conversion is enabled and the
conversion result is output.
An operation example of D/A conversion on channel 0 is shown below. Figure 23.2 shows the
timing of this operation.
1. Write the conversion data to DADR0.
2. Set the DAOE0 bit in DACR01 to 1 to start D/A conversion. The conversion result is output
3. If DADR0 is written to again, the conversion is immediately started. The conversion result is
4. If the DAOE0 bit is cleared to 0, analog output is disabled.
from the analog output pin DA0 after the conversion time t
result continues to be output until DADR0 is written to again or the DAOE0 bit is cleared to 0.
The output value is expressed by the following formula:
output after the conversion time t
Contents of DADR/256 × V
Operation
Address
DADR0
DAOE0
DA0
[Legend]
t
DCONV
: D/A conversion time
High-impedance state
write cycle
DADR0
Figure 23.2 Example of D/A Converter Operation
write cycle
DACR01
ref
DCONV
Conversion data 1
has elapsed.
t
DCONV
Conversion
result 1
write cycle
DADR0
Rev. 2.00 Sep. 24, 2008 Page 1101 of 1468
DCONV
t
DCONV
has elapsed. The conversion
Conversion data 2
Conversion
Section 23 D/A Converter
result 2
write cycle
DACR01
REJ09B0412-0200

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