R5F61668RN50FPV Renesas Electronics America, R5F61668RN50FPV Datasheet - Page 356

• Manufacturer Part Number: R5F61668RN50FPV
• Description: IC H8SX/1668 MCU FLASH 144LQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8SX/1600r

Specifications of R5F61668RN50FPV

• Core Processor: H8SX
• Core Size: 16/32-Bit
• Speed: 50MHz
• Connectivity: EBI/EMI, I²C, IrDA, SCI, SmartCard, USB
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 92
• Program Memory Size: 1MB (1M x 8)
• Program Memory Type: FLASH
• Ram Size: 56K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 144-LQFP
• For Use With: R0K561668S000BE - KIT STARTER FOR H8SX/1668R0K561664S001BE - KIT STARTER FOR H8SX/1651HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Section 9 Bus Controller (BSC)
(1)
two cycles are the same, a column address output cycle follows. The row address bits to be
compared are decided by bits MXC1 and MXC0 in DRAMCR.
A fast-page mode access is performed when the access data size exceeds the bus width of the
SDRAM and when consecutive accesses to the SDRAM are generated.
Figures 9.72 and 9.73 show longword access timing of the 16-bit bus SDRAM and word access
timing of the 8-bit bus SDRAM, respectively.
Rev. 2.00 Sep. 24, 2008 Page 322 of 1468
REJ09B0412-0200
When access cycles to the SDRAM space are continued and the row addresses of the consecutive
Fast-Page Mode Operation Timing
Figure 9.72 Longword Write Timing in 16-Bit Access Space (BE = 1, RCDM = 0)
Precharge-sel
Address bus
D15 to D8
SDRAMφ
D7 to D0
DQMLU
DQMLL
RD/WR
RAS
CAS
CKE
WE
CS
BS
PALL
T
Row address
p
ACTV
address
Row
T
r
Column address 1
NOP
High
T
c1
WRIT
T
c2
Column address 2
NOP
T
c1
WRIT
T
c2