R5F61668RN50FPV Renesas Electronics America, R5F61668RN50FPV Datasheet - Page 910

• Manufacturer Part Number: R5F61668RN50FPV
• Description: IC H8SX/1668 MCU FLASH 144LQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8SX/1600r

Specifications of R5F61668RN50FPV

• Core Processor: H8SX
• Core Size: 16/32-Bit
• Speed: 50MHz
• Connectivity: EBI/EMI, I²C, IrDA, SCI, SmartCard, USB
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 92
• Program Memory Size: 1MB (1M x 8)
• Program Memory Type: FLASH
• Ram Size: 56K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 144-LQFP
• For Use With: R0K561668S000BE - KIT STARTER FOR H8SX/1668R0K561664S001BE - KIT STARTER FOR H8SX/1651HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Section 19 Serial Communication Interface (SCI, IrDA, CRC)
19.3.3
TDR is an 8-bit register that stores transmit data. When the SCI detects that TSR is empty, it
transfers the transmit data written in TDR to TSR and starts transmission. The double-buffered
structures of TDR and TSR enable continuous serial transmission. If the next transmit data has
already been written to TDR when one frame of data is transmitted, the SCI transfers the written
data to TSR to continue transmission. Although TDR can be read from or written to by the CPU at
all times, to achieve reliable serial transmission, write transmit data to TDR for only once after
confirming that the TDRE bit in SSR is set to 1.
19.3.4
TSR is a shift register that transmits serial data. To perform serial data transmission, the SCI first
automatically transfers transmit data from TDR to TSR, and then sends the data to the TxD pin.
TSR cannot be directly accessed by the CPU.
19.3.5
SMR is used to set the SCI's serial transfer format and select the baud rate generator clock source.
Some bits in SMR have different functions in normal mode and smart card interface mode.
• When SMIF in SCMR = 0
• When SMIF in SCMR = 1
Rev. 2.00 Sep. 24, 2008 Page 876 of 1468
REJ09B0412-0200
Bit
Bit Name
Initial Value
R/W
Bit
Bit Name
Initial Value
R/W
Bit
Bit Name
Initial Value
R/W
Transmit Data Register (TDR)
Transmit Shift Register (TSR)
Serial Mode Register (SMR)
R/W
R/W
R/W
C/A
GM
7
1
7
0
7
0
CHR
R/W
R/W
R/W
BLK
6
0
6
1
6
0
R/W
R/W
R/W
PE
PE
5
1
5
0
5
0
R/W
R/W
R/W
O/E
O/E
4
1
4
0
4
0
STOP
BCP1
R/W
R/W
R/W
3
0
3
0
3
1
BCP0
R/W
R/W
R/W
MP
2
1
2
0
2
0
CKS1
CKS1
R/W
R/W
R/W
1
0
1
0
1
1
CKS0
CKS0
R/W
R/W
R/W
0
1
0
0
0
0