R5F61668RN50FPV Renesas Electronics America, R5F61668RN50FPV Datasheet - Page 265

• Manufacturer Part Number: R5F61668RN50FPV
• Description: IC H8SX/1668 MCU FLASH 144LQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8SX/1600r

Specifications of R5F61668RN50FPV

• Core Processor: H8SX
• Core Size: 16/32-Bit
• Speed: 50MHz
• Connectivity: EBI/EMI, I²C, IrDA, SCI, SmartCard, USB
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 92
• Program Memory Size: 1MB (1M x 8)
• Program Memory Type: FLASH
• Ram Size: 56K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 144-LQFP
• For Use With: R0K561668S000BE - KIT STARTER FOR H8SX/1668R0K561664S001BE - KIT STARTER FOR H8SX/1651HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

9.5.4
The type of the external bus interfaces, bus width, endian format, number of access cycles, and
strobe assert/negate timings can be set for each area in the external address space. The bus width
and the number of access cycles for both on-chip memory and internal I/O registers are fixed, and
are not affected by the external bus settings.
(1)
Six types of external bus interfaces are provided and can be selected in area units. Table 9.4 shows
each interface name, description, area name to be set for each interface. Table 9.5 shows the areas
that can be specified for each interface. The initial state of each area is a basic bus interface.
Table 9.4
Interface
Basic interface
Byte control SRAM interface
Burst ROM interface
Address/data multiplexed I/O
interface
Type of External Bus Interface
External Bus Interface
Bφ
CS5
CS6
Output waveform
Address bus
Interface Names and Area Names
Figure 9.10 Timing When CS Signal is Output to the Same Pin
Description
Directly connected to ROM and
RAM
Directly connected to byte
SRAM with byte control pin
Directly connected to the ROM
that allows page access
Directly connected to the
peripheral LSI that requires
address and data multiplexing
Area 5 access
Area 5 access
Rev. 2.00 Sep. 24, 2008 Page 231 of 1468
Area 6 access
Area 6 access
Area Name
Basic bus space
Byte control SRAM space
Burst ROM space
Address/data multiplexed I/O
space
Section 9 Bus Controller (BSC)
REJ09B0412-0200