R5F61668RN50FPV Renesas Electronics America, R5F61668RN50FPV Datasheet - Page 673

IC H8SX/1668 MCU FLASH 144LQFP

R5F61668RN50FPV

Manufacturer Part Number
R5F61668RN50FPV
Description
IC H8SX/1668 MCU FLASH 144LQFP
Manufacturer
Renesas Electronics America
Series
H8® H8SX/1600r
Datasheet

Specifications of R5F61668RN50FPV

Core Processor
H8SX
Core Size
16/32-Bit
Speed
50MHz
Connectivity
EBI/EMI, I²C, IrDA, SCI, SmartCard, USB
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
92
Program Memory Size
1MB (1M x 8)
Program Memory Type
FLASH
Ram Size
56K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
144-LQFP
For Use With
R0K561668S000BE - KIT STARTER FOR H8SX/1668R0K561664S001BE - KIT STARTER FOR H8SX/1651HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
R5F61668RN50FPV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
(5)
The pin function is switched as shown below according to the combination of operating mode, the
EXPE bit, the port function control register (PFCR), and the PF3DDR bit settings.
Note:
(6)
The pin function is switched as shown below according to the combination of operating mode, the
EXPE bit, the port function control register (PFCR), and the PF2DDR bit settings.
Note:
MCU
Operating Mode
On-chip ROM
disabled extended
mode
Modes other than
on-chip ROM
disabled extended
mode
MCU
Operating Mode
On-chip ROM
disabled extended
mode
Modes other than
on-chip ROM
disabled extended
mode
PF3/A19
PF2/A18
*
*
Valid in external extended mode (EXPE = 1)
Valid in external extended mode (EXPE = 1)
Module Name
Bus controller
Bus controller
I/O port
Module Name
Bus controller
Bus controller
I/O port
Pin Function
A19 output
A19 output*
PF3 output
PF3 input
(initial value)
Pin Function
A18 output
A18 output*
PF2 output
PF2 input
(initial value)
A19_OE
1
0
0
A18_OE
1
0
0
Rev. 2.00 Sep. 24, 2008 Page 639 of 1468
I/O Port
I/O Port
Setting
Setting
PF3DDR
1
0
PF2DDR
1
0
Section 13 I/O Ports
REJ09B0412-0200

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