R5F61668RN50FPV Renesas Electronics America, R5F61668RN50FPV Datasheet - Page 669

IC H8SX/1668 MCU FLASH 144LQFP

R5F61668RN50FPV

Manufacturer Part Number
R5F61668RN50FPV
Description
IC H8SX/1668 MCU FLASH 144LQFP
Manufacturer
Renesas Electronics America
Series
H8® H8SX/1600r
Datasheet

Specifications of R5F61668RN50FPV

Core Processor
H8SX
Core Size
16/32-Bit
Speed
50MHz
Connectivity
EBI/EMI, I²C, IrDA, SCI, SmartCard, USB
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
92
Program Memory Size
1MB (1M x 8)
Program Memory Type
FLASH
Ram Size
56K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
144-LQFP
For Use With
R0K561668S000BE - KIT STARTER FOR H8SX/1668R0K561664S001BE - KIT STARTER FOR H8SX/1651HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
R5F61668RN50FPV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
13.2.9
The pin function of port D can be switched with that of port J according to the combination of
operating mode, the EXPE bit, and the PCJKE bit settings. The pin function of port D can be
switched according to the PCJKE bit setting in the single-chip mode (EXPE = 0). However, do not
change the setting of the PCJKE bit in external extended mode. For details, see section 13.3.12,
Port Function Control Register D (PFCRD).
(1)
The pin function is switched as shown below according to the combination of operating mode, the
EXPE bit, and the PDnDDR bit settings.
[Legend]
n:
Note:
Module Name
Bus controller
I/O port
PD7/A7, PD6/A6, PD5/A5, PD4/A4, PD3/A3, PD2/A2, PD1/A1, PD0/A0
0 to 7
*
Port D
Address output is enabled by setting PDnDDR = 1 in external extended mode
(EXPE = 1)
Pin Function
Address output
PDn output
PDn input
(initial value)
MCU Operating Mode
On-chip ROM disabled extended mode
On-chip ROM enabled extended mode
Single-chip mode*
Modes other than on-chip ROM
disabled extended mode
Rev. 2.00 Sep. 24, 2008 Page 635 of 1468
Setting
Section 13 I/O Ports
I/O Port
PDnDDR
1
1
0
REJ09B0412-0200

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