R5F61668RN50FPV Renesas Electronics America, R5F61668RN50FPV Datasheet - Page 753

IC H8SX/1668 MCU FLASH 144LQFP

R5F61668RN50FPV

Manufacturer Part Number
R5F61668RN50FPV
Description
IC H8SX/1668 MCU FLASH 144LQFP
Manufacturer
Renesas Electronics America
Series
H8® H8SX/1600r
Datasheet

Specifications of R5F61668RN50FPV

Core Processor
H8SX
Core Size
16/32-Bit
Speed
50MHz
Connectivity
EBI/EMI, I²C, IrDA, SCI, SmartCard, USB
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
92
Program Memory Size
1MB (1M x 8)
Program Memory Type
FLASH
Ram Size
56K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
144-LQFP
For Use With
R0K561668S000BE - KIT STARTER FOR H8SX/1668R0K561664S001BE - KIT STARTER FOR H8SX/1651HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
R5F61668RN50FPV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Table 14.27 TIORL_3
[Legend]
x:
Note:
Bit 3
IOC3
0
0
0
0
0
0
0
0
1
1
1
1
Don't care
1. When the bits TPSC2 to TPSC0 in TCR_4 are set to B'000 and Pφ/1 is used as the
2. When the BFA bit in TMDR_3 is set to 1 and TGRC_3 is used as a buffer register, this
Bit 2
IOC2
0
0
0
0
1
1
1
1
0
0
0
1
count clock of TCNT_4, this setting is invalid and input capture is not generated.
setting is invalid and input capture/output compare is not generated.
Bit 1
IOC1
0
0
1
1
0
0
1
1
0
0
1
x
Bit 0
IOC0
0
1
0
1
0
1
0
1
0
1
x
x
TGRC_3
Function
Output
compare
register*
Input
capture
register*
2
2
TIOCC3 Pin Function
Output disabled
Initial output is 0 output
0 output at compare match
Initial output is 0 output
1 output at compare match
Initial output is 0 output
Toggle output at compare match
Output disabled
Initial output is 1 output
0 output at compare match
Initial output is 1 output
1 output at compare match
Initial output is 1 output
Toggle output at compare match
Capture input source is TIOCC3 pin
Input capture at rising edge
Capture input source is TIOCC3 pin
Input capture at falling edge
Capture input source is TIOCC3 pin
Input capture at both edges
Capture input source is channel 4/count clock
Input capture at TCNT_4 count-up/count-down*
Rev. 2.00 Sep. 24, 2008 Page 719 of 1468
Section 14 16-Bit Timer Pulse Unit (TPU)
Description
REJ09B0412-0200
1

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