DSPIC33FJ64MC510T-I/PT Microchip Technology, DSPIC33FJ64MC510T-I/PT Datasheet - Page 151

• Manufacturer Part Number: DSPIC33FJ64MC510T-I/PT
• Description: IC DSPIC MCU/DSP 64K 100TQFP
• Manufacturer: Microchip Technology
• Series: dsPIC™ 33Fr

Specifications of DSPIC33FJ64MC510T-I/PT

• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 40 MIPs
• Connectivity: CAN, I²C, IrDA, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, Motor Control PWM, QEI, POR, PWM, WDT
• Number Of I /o: 85
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 24x10b/12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-TFQFP
• For Use With: AC164333 - MODULE SKT FOR PM3 100QFPMA330013 - MODULE PLUG-IN DSPIC33 100TQFPDV164033 - KIT START EXPLORER 16 MPLAB ICD2DM240001 - BOARD DEMO PIC24/DSPIC33/PIC32
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

8.0
The dsPIC33F oscillator system provides:
• Various external and internal oscillator options as
• An on-chip PLL to scale the internal operating
FIGURE 8-1:
© 2007 Microchip Technology Inc.
Note:
clock sources
frequency to the required system clock frequency
SOSCO
SOSCI
OSC2
OSC1
OSCILLATOR
CONFIGURATION
This data sheet summarizes the features
of this group of dsPIC33F devices. It is not
intended to be a comprehensive reference
source. To complement the information in
this data sheet, refer to the “dsPIC30F
Family Reference Manual” (DS70046).
Secondary Oscillator
Primary Oscillator
Oscillator
Oscillator
LPRC
FRC
dsPIC33F OSCILLATOR SYSTEM DIAGRAM
SOSCEN
Enable
Oscillator
Divide
By 16
PLL
FRCDIV<2:0>
Preliminary
dsPIC33F
• The internal FRC oscillator can also be used with
• Clock switching between various clock sources
• Programmable clock postscaler for system power
• A Fail-Safe Clock Monitor (FSCM) that detects
• A Clock Control register (OSCCON)
• Nonvolatile Configuration bits for main oscillator
A simplified diagram of the oscillator system is shown
in Figure 8-1.
ECPLL, FRCPLL
the PLL, thereby allowing full-speed operation
without any external clock generation hardware
savings
clock failure and takes fail-safe measures
selection.
XTPLL, HSPLL,
FRC, FRCDIVN
XT, HS, EC
FRCDIV16
SOSC
LPRC
Clock Control Logic
Fail-Safe
Monitor
Clock
DOZE<2:0>
dsPIC33F
WDT, PWRT
Clock Source Option
for other Modules
DS70165E-page 149
Peripherals
CPU