DSPIC33FJ64MC510T-I/PT Microchip Technology, DSPIC33FJ64MC510T-I/PT Datasheet - Page 276

IC DSPIC MCU/DSP 64K 100TQFP

DSPIC33FJ64MC510T-I/PT

Manufacturer Part Number
DSPIC33FJ64MC510T-I/PT
Description
IC DSPIC MCU/DSP 64K 100TQFP
Manufacturer
Microchip Technology
Series
dsPIC™ 33Fr

Specifications of DSPIC33FJ64MC510T-I/PT

Core Processor
dsPIC
Core Size
16-Bit
Speed
40 MIPs
Connectivity
CAN, I²C, IrDA, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, Motor Control PWM, QEI, POR, PWM, WDT
Number Of I /o
85
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 24x10b/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-TFQFP
For Use With
AC164333 - MODULE SKT FOR PM3 100QFPMA330013 - MODULE PLUG-IN DSPIC33 100TQFPDV164033 - KIT START EXPLORER 16 MPLAB ICD2DM240001 - BOARD DEMO PIC24/DSPIC33/PIC32
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DSPIC33FJ64MC510T-I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
Part Number:
DSPIC33FJ64MC510T-I/PT
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
dsPIC33F
REGISTER 21-5:
REGISTER 21-6:
DS70165E-page 274
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15-0
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15-0
RSE15
TSE15
R/W-0
R/W-0
R/W-0
R/W-0
RSE7
TSE7
RSE<15:0>: Receive Slot Enable bits
1 = CSDI data is received during the individual time slot n
0 = CSDI data is ignored during the individual time slot n
TSE<15:0>: Transmit Slot Enable Control bits
1 = Transmit buffer contents are sent during the individual time slot n
0 = CSDO pin is tri-stated or driven to logic ‘0’, during the individual time slot, depending on the state
RSE14
TSE14
R/W-0
R/W-0
R/W-0
R/W-0
RSE6
TSE6
of the CSDOM bit
RSCON: DCI RECEIVE SLOT CONTROL REGISTER
TSCON: DCI TRANSMIT SLOT CONTROL REGISTER
W = Writable bit
W = Writable bit
‘1’ = Bit is set
‘1’ = Bit is set
RSE13
TSE13
R/W-0
R/W-0
R/W-0
R/W-0
RSE5
TSE5
RSE12
TSE12
R/W-0
R/W-0
R/W-0
R/W-0
RSE4
TSE4
Preliminary
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
RSE11
TSE11
R/W-0
R/W-0
R/W-0
R/W-0
RSE3
TSE3
RSE10
TSE10
R/W-0
R/W-0
R/W-0
R/W-0
RSE2
TSE2
© 2007 Microchip Technology Inc.
x = Bit is unknown
x = Bit is unknown
R/W-0
R/W-0
R/W-0
R/W-0
RSE9
RSE1
TSE9
TSE1
R/W-0
R/W-0
R/W-0
R/W-0
RSE8
RSE0
TSE8
TSE0
bit 8
bit 0
bit 8
bit 0

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