DSPIC33FJ64MC510T-I/PT Microchip Technology, DSPIC33FJ64MC510T-I/PT Datasheet - Page 297

IC DSPIC MCU/DSP 64K 100TQFP

DSPIC33FJ64MC510T-I/PT

Manufacturer Part Number
DSPIC33FJ64MC510T-I/PT
Description
IC DSPIC MCU/DSP 64K 100TQFP
Manufacturer
Microchip Technology
Series
dsPIC™ 33Fr

Specifications of DSPIC33FJ64MC510T-I/PT

Core Processor
dsPIC
Core Size
16-Bit
Speed
40 MIPs
Connectivity
CAN, I²C, IrDA, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, Motor Control PWM, QEI, POR, PWM, WDT
Number Of I /o
85
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 24x10b/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-TFQFP
For Use With
AC164333 - MODULE SKT FOR PM3 100QFPMA330013 - MODULE PLUG-IN DSPIC33 100TQFPDV164033 - KIT START EXPLORER 16 MPLAB ICD2DM240001 - BOARD DEMO PIC24/DSPIC33/PIC32
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

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DSPIC33FJ64MC510T-I/PT
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23.4
dsPIC33F devices implement a JTAG interface, which
supports boundary scan device testing, as well as
in-circuit programming. Detailed information on the
interface will be provided in future revisions of the
document.
23.5
The dsPIC33F product families offer the advanced
implementation of CodeGuard™ Security. CodeGuard
Security enables multiple parties to securely share
resources (memory, interrupts and peripherals) on a
single chip. This feature helps protect individual
Intellectual Property in collaborative system designs.
When coupled with software encryption libraries,
CodeGuard™ Security can be used to securely update
Flash even when multiple IP are resident on the single
chip. The code protection features vary depending on
the actual dsPIC33F implemented. The following
sections provide an overview of these features.
The code protection features are controlled by the
Configuration registers: FBS, FSS and FGS.
23.6
dsPIC33F family digital signal controllers can be seri-
ally programmed while in the end application circuit.
This is simply done with two lines for clock and data
and three other lines for power, ground and the
programming sequence. This allows customers to
manufacture boards with unprogrammed devices and
then program the digital signal controller just before
shipping the product. This also allows the most recent
firmware or a custom firmware, to be programmed.
Please refer to the “dsPIC33F Flash Programming
Specification” (DS70152) document for details about
ICSP.
Any 1 out of 3 pairs of programming clock/data pins
may be used:
• PGC1/EMUC1 and PGD1/EMUD1
• PGC2/EMUC2 and PGD2/EMUD2
• PGC3/EMUC3 and PGD3/EMUD3
© 2007 Microchip Technology Inc.
Note:
JTAG Interface
Code Protection and
CodeGuard™ Security
In-Circuit Serial Programming
Refer to GodeGuard Security Reference
Manual (DS70180) for further information
on usage, configuration and operation of
CodeGuard Security.
Preliminary
23.7
When MPLAB
in-circuit debugging functionality is enabled. This func-
tion allows simple debugging functions when used with
MPLAB IDE. Debugging functionality is controlled
through the EMUCx (Emulation/Debug Clock) and
EMUDx (Emulation/Debug Data) pin functions.
Any 1 out of 3 pairs of debugging clock/data pins may
be used:
• PGC1/EMUC1 and PGD1/EMUD1
• PGC2/EMUC2 and PGD2/EMUD2
• PGC3/EMUC3 and PGD3/EMUD3
To use the in-circuit debugger function of the device,
the design must implement ICSP connections to
MCLR, V
pin pair. In addition, when the feature is enabled, some
of the resources are not available for general use.
These resources include the first 80 bytes of data RAM
and two I/O pins.
In-Circuit Debugger
DD
, V
®
SS
ICD 2 is selected as a debugger, the
, PGC, PGD and the EMUDx/EMUCx
dsPIC33F
DS70165E-page 295

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