DSPIC33FJ64MC510T-I/PT Microchip Technology, DSPIC33FJ64MC510T-I/PT Datasheet - Page 68

• Manufacturer Part Number: DSPIC33FJ64MC510T-I/PT
• Description: IC DSPIC MCU/DSP 64K 100TQFP
• Manufacturer: Microchip Technology
• Series: dsPIC™ 33Fr

Specifications of DSPIC33FJ64MC510T-I/PT

• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 40 MIPs
• Connectivity: CAN, I²C, IrDA, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, Motor Control PWM, QEI, POR, PWM, WDT
• Number Of I /o: 85
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 24x10b/12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-TFQFP
• For Use With: AC164333 - MODULE SKT FOR PM3 100QFPMA330013 - MODULE PLUG-IN DSPIC33 100TQFPDV164033 - KIT START EXPLORER 16 MPLAB ICD2DM240001 - BOARD DEMO PIC24/DSPIC33/PIC32
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

TABLE 3-31:
TABLE 3-32:
TABLE 3-33:
TABLE 3-34:
File Name
RCON
OSCCON
CLKDIV
PLLFBD
OSCTUN
Legend:
Note
NVMCON
NVMKEY
Legend:
Note
PMD1
PMD2
PMD3
Legend:
File Name
TRISG
PORTG
LATG
ODCG
Legend:
Note
File Name
File Name
1:
2:
1:
1:
Addr
0740
0742
0744
0746
0748
x = unknown value on Reset, — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.
RCON register Reset values dependent on type of Reset.
OSCCON register Reset values dependent on the FOSC Configuration bits and by type of Reset.
x = unknown value on Reset, — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.
Reset value shown is for POR only. Value on other Reset states is dependent on the state of memory write or erase operations at the time of Reset.
x = unknown value on Reset, — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.
Addr
02E4
02E6
02E8
06E4
x = unknown value on Reset, — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal for 100-pin devices.
The actual set of I/O port pins varies from one device to another. Please refer to the corresponding pinout diagrams.
Addr
Addr
0770
0772
0774
0760
0766
PORTG REGISTER MAP
SYSTEM CONTROL REGISTER MAP
NVM REGISTER MAP
PMD REGISTER MAP
TRAPR
TRISG15
ODCG15
Bit 15
LATG15
IC8MD
Bit 15
Bit 15
Bit 15
T5MD
T9MD
ROI
RG15
—
—
—
WR
—
IOPUWR
IC7MD
Bit 14
Bit 14
T4MD
T8MD
TRISG14
ODCG14
WREN
Bit 14
LATG14
Bit 14
—
—
RG14
—
COSC<2:0>
DOZE<2:0>
IC6MD
Bit 13
T3MD
T7MD
Bit 13
WRERR
Bit 13
—
—
—
TRISG13
ODCG13
LATG13
Bit 13
—
RG13
IC5MD
Bit 12
T2MD
T6MD
Bit 12
Bit 12
—
—
—
(1)
TRISG12
ODCG12
—
—
LATG12
Bit 12
RG12
IC4MD
DOZEN
Bit 11
T1MD
Bit 11
—
—
—
—
—
Bit 11
—
—
Bit 11
—
—
—
—
QEIMD
IC3MD
Bit 10
Bit 10
—
—
—
—
Bit 10
Bit 10
—
—
—
—
—
—
FRCDIV<2:0>
NOSC<2:0>
PWMMD
IC2MD
Bit 9
Bit 9
—
—
—
—
TRISG9
ODCG9
Bit 9
LATG9
Bit 9
RG9
—
—
VREGS
DCIMD
IC1MD
Bit 8
Bit 8
—
—
TRISG8
ODCG8
LATG8
Bit 8
Bit 8
RG8
—
—
CLKLOCK
I2C1MD
OC8MD
EXTR
Bit 7
PLLPOST<1:0>
Bit 7
—
TRISG7
—
ODCG7
LATG7
Bit 7
Bit 7
RG7
—
OC7MD
Bit 6
SWR
U2MD
Bit 6
TRISG6
ODCG6
LATG6
—
—
ERASE
Bit 6
—
RG6
Bit 6
SWDTEN
LOCK
OC6MD
Bit 5
U1MD
Bit 5
—
Bit 5
—
Bit 5
—
—
—
—
—
PLLDIV<8:0>
WDTO
SPI2MD
OC5MD
Bit 4
Bit 4
—
Bit 4
—
—
—
—
Bit 4
—
NVMKEY<7:0>
—
SLEEP
TRISG3
SPI1MD
ODCG3
Bit 3
OC4MD
LATG3
Bit 3
CF
RG3
Bit 3
Bit 3
—
TUN<5:0>
PLLPRE<4::0>
TRISG2
ODCG2
Bit 2
OC3MD
IDLE
LATG2
Bit 2
C2MD
RG2
—
Bit 2
Bit 2
—
NVMOP<3:0>
LPOSCEN
TRISG1
ODCG1
LATG1
OC2MD
I2C2MD
Bit 1
Bit 1
BOR
RG1
C1MD
Bit 1
Bit 1
TRISG0
ODCG0
LATG0
OSWEN
Bit 0
AD1MD
OC1MD
AD2MD
RG0
Bit 0
POR
Bit 0
Bit 0
Resets
Resets
F3CF
xxxx
xxxx
xxxx
Resets
Resets
xxxx
0300
0040
0030
0000
0000
0000
All
0000
0000
0000
All
All
All
(1)
(2)
(1)