DSPIC33FJ64MC510T-I/PT Microchip Technology, DSPIC33FJ64MC510T-I/PT Datasheet - Page 188

• Manufacturer Part Number: DSPIC33FJ64MC510T-I/PT
• Description: IC DSPIC MCU/DSP 64K 100TQFP
• Manufacturer: Microchip Technology
• Series: dsPIC™ 33Fr

Specifications of DSPIC33FJ64MC510T-I/PT

• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 40 MIPs
• Connectivity: CAN, I²C, IrDA, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, Motor Control PWM, QEI, POR, PWM, WDT
• Number Of I /o: 85
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 24x10b/12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-TFQFP
• For Use With: AC164333 - MODULE SKT FOR PM3 100QFPMA330013 - MODULE PLUG-IN DSPIC33 100TQFPDV164033 - KIT START EXPLORER 16 MPLAB ICD2DM240001 - BOARD DEMO PIC24/DSPIC33/PIC32
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

dsPIC33F
REGISTER 15-4:
DS70165E-page 186
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15
bit 14-0
Note 1:
SEVTDIR
R/W-0
R/W-0
2:
(1)
SEVTDIR is compared with PTDIR (PTMR<15>) to generate the Special Event Trigger.
SEVTCMP<14:0> is compared with PTMR<14:0> to generate the Special Event Trigger.
SEVTDIR: Special Event Trigger Time Base Direction bit
1 = A Special Event Trigger will occur when the PWM time base is counting downwards
0 = A Special Event Trigger will occur when the PWM time base is counting upwards
SEVTCMP<14:0>: Special Event Compare Value bits
R/W-0
R/W-0
SEVTCMP: SPECIAL EVENT COMPARE REGISTER
W = Writable bit
‘1’ = Bit is set
R/W-0
R/W-0
R/W-0
R/W-0
SEVTCMP<7:0>
Preliminary
SEVTCMP<14:8>
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
R/W-0
R/W-0
(2)
(2)
(1)
(2)
R/W-0
R/W-0
© 2007 Microchip Technology Inc.
x = Bit is unknown
R/W-0
R/W-0
R/W-0
R/W-0
bit 8
bit 0