DSPIC33FJ64MC510T-I/PT Microchip Technology, DSPIC33FJ64MC510T-I/PT Datasheet - Page 260

• Manufacturer Part Number: DSPIC33FJ64MC510T-I/PT
• Description: IC DSPIC MCU/DSP 64K 100TQFP
• Manufacturer: Microchip Technology
• Series: dsPIC™ 33Fr

Specifications of DSPIC33FJ64MC510T-I/PT

• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 40 MIPs
• Connectivity: CAN, I²C, IrDA, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, Motor Control PWM, QEI, POR, PWM, WDT
• Number Of I /o: 85
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 24x10b/12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-TFQFP
• For Use With: AC164333 - MODULE SKT FOR PM3 100QFPMA330013 - MODULE PLUG-IN DSPIC33 100TQFPDV164033 - KIT START EXPLORER 16 MPLAB ICD2DM240001 - BOARD DEMO PIC24/DSPIC33/PIC32
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

dsPIC33F
REGISTER 20-28: CiTRBnDLC: ECAN BUFFER n DATA LENGTH CONTROL (n = 0, 1, ..., 31)
REGISTER 20-29: CiTRBnDm: ECAN BUFFER n DATA FIELD BYTE m (n = 0, 1, ..., 31; m = 0, 1, ..., 7)
DS70165E-page 258
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15-10
bit 9
bit 8
bit 7-5
bit 4
bit 3-0
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7-0
Note 1:
TRBnDm7
R/W-x
R/W-x
EID5
U-0
—
The Most Significant Byte contains byte (m + 1) of the buffer.
EID<5:0>: Extended Identifier bits
RTR: Remote Transmission Request bit
1 = Message will request remote transmission
0 = Normal message
RB1: Reserved Bit 1
User must set this bit to ‘0’ per CAN protocol.
Unimplemented: Read as ‘0’
RB0: Reserved Bit 0
User must set this bit to ‘0’ per CAN protocol.
DLC<3:0>: Data Length Code bits
TRnDm<7:0>: Data Field Buffer ‘n’ Byte ‘m’ bits
TRBnDm6
R/W-x
R/W-x
EID4
U-0
—
W = Writable bit
W = Writable bit
‘1’ = Bit is set
‘1’ = Bit is set
TRBnDm5
R/W-x
R/W-x
EID3
U-0
—
TRBnDm4
R/W-x
R/W-x
R/W-x
EID2
RB0
Preliminary
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
TRBnDm3
R/W-x
R/W-x
R/W-x
DLC3
EID1
TRBnDm2
R/W-x
R/W-x
R/W-x
DLC2
EID0
© 2007 Microchip Technology Inc.
x = Bit is unknown
x = Bit is unknown
TRBnDm1
R/W-x
R/W-x
R/W-x
DLC1
RTR
TRBnDm0
R/W-x
R/W-x
R/W-x
DLC0
RB1
bit 8
bit 0
bit 0
(1)