IC MCU 8BIT OTP/EPROM 28 PSOIC

ST62T65CM6

Manufacturer Part NumberST62T65CM6
DescriptionIC MCU 8BIT OTP/EPROM 28 PSOIC
ManufacturerSTMicroelectronics
SeriesST6
ST62T65CM6 datasheet
 


Specifications of ST62T65CM6

Core ProcessorST6Core Size8-Bit
Speed8MHzConnectivitySPI
PeripheralsLED, LVD, POR, WDTNumber Of I /o21
Program Memory Size3.8KB (3.8K x 8)Program Memory TypeOTP
Eeprom Size128 x 8Ram Size128 x 8
Voltage - Supply (vcc/vdd)3 V ~ 6 VData ConvertersA/D 13x8b
Oscillator TypeInternalOperating Temperature-40°C ~ 85°C
Package / Case28-SOIC (7.5mm Width)Controller Family/seriesST6
No. Of I/o's21Eeprom Memory Size128Byte
Ram Memory Size128ByteCpu Speed8MHz
No. Of Timers2Rohs CompliantYes
Processor SeriesST62T6xCoreST6
Data Bus Width8 bitData Ram Size128 B
Interface TypeSCIMaximum Clock Frequency8 MHz
Number Of Programmable I/os21Number Of Timers1
Operating Supply Voltage3 V to 6 VMaximum Operating Temperature+ 125 C
Mounting StyleSMD/SMTDevelopment Tools By SupplierST62GP-EMU2, ST62E2XC-EPB/110, ST62E6XC-EPB/US, STREALIZER-II
Minimum Operating Temperature- 40 COn-chip Adc8 bit
Lead Free Status / RoHS StatusLead free / RoHS CompliantOther names497-2103-5
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ST6255C ST6265C ST6265B
CLOCK SYSTEM (Cont’d)
Oscillator Control Registers
Address: DCh — Write only
Reset State: 00h
7
OSCR
-
-
-
-
3
Bit 7-4. These bits are not used.
Bit 3. Reserved. Cleared at Reset. Must be kept
cleared.
Bit 2. Reserved. Must be kept low.
RS1-RS0. These bits select the division ratio of
the Oscillator Divider in order to generate the inter-
nal frequency. The following selctions are availa-
ble:
20/84
RS1
0
0
1
1
0
Note: Care is required when handling the OSCR
-
RS1
RS0
register as some bits are write only. For this rea-
son, it is not allowed to change the OSCR contents
while executing interrupt service routine, as the
service routine cannot save and then restore its
previous content. If it is impossible to avoid the
writing of this register in interrupt service routine,
an image of this register must be saved in a RAM
location, and each time the program writes to
OSCR it must write also to the image register. The
image register must be written first, so if an inter-
rupt occurs between the two instructions the
OSCR is not affected.
RS0
Division Ratio
0
1
1
2
0
4
1
4