IC MCU 8BIT OTP/EPROM 28 PSOIC

ST62T65CM6

Manufacturer Part NumberST62T65CM6
DescriptionIC MCU 8BIT OTP/EPROM 28 PSOIC
ManufacturerSTMicroelectronics
SeriesST6
ST62T65CM6 datasheet
 


Specifications of ST62T65CM6

Core ProcessorST6Core Size8-Bit
Speed8MHzConnectivitySPI
PeripheralsLED, LVD, POR, WDTNumber Of I /o21
Program Memory Size3.8KB (3.8K x 8)Program Memory TypeOTP
Eeprom Size128 x 8Ram Size128 x 8
Voltage - Supply (vcc/vdd)3 V ~ 6 VData ConvertersA/D 13x8b
Oscillator TypeInternalOperating Temperature-40°C ~ 85°C
Package / Case28-SOIC (7.5mm Width)Controller Family/seriesST6
No. Of I/o's21Eeprom Memory Size128Byte
Ram Memory Size128ByteCpu Speed8MHz
No. Of Timers2Rohs CompliantYes
Processor SeriesST62T6xCoreST6
Data Bus Width8 bitData Ram Size128 B
Interface TypeSCIMaximum Clock Frequency8 MHz
Number Of Programmable I/os21Number Of Timers1
Operating Supply Voltage3 V to 6 VMaximum Operating Temperature+ 125 C
Mounting StyleSMD/SMTDevelopment Tools By SupplierST62GP-EMU2, ST62E2XC-EPB/110, ST62E6XC-EPB/US, STREALIZER-II
Minimum Operating Temperature- 40 COn-chip Adc8 bit
Lead Free Status / RoHS StatusLead free / RoHS CompliantOther names497-2103-5
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Page 60/84

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ST6255C ST6265C ST6265B
INSTRUCTION SET (Cont’d)
Arithmetic and Logic. These instructions are
used to perform the arithmetic calculations and
logic operations. In AND, ADD, CP, SUB instruc-
tions one operand is always the accumulator while
the other can be either a data space memory con-
Table 19. Arithmetic & Logic Instructions
Instruction
Addressing Mode
ADD A, (X)
Indirect
ADD A, (Y)
Indirect
ADD A, rr
Direct
ADDI A, #N
Immediate
AND A, (X)
Indirect
AND A, (Y)
Indirect
AND A, rr
Direct
ANDI A, #N
Immediate
CLR A
Short Direct
CLR r
Direct
COM A
Inherent
CP A, (X)
Indirect
CP A, (Y)
Indirect
CP A, rr
Direct
CPI A, #N
Immediate
DEC X
Short Direct
DEC Y
Short Direct
DEC V
Short Direct
DEC W
Short Direct
DEC A
Direct
DEC rr
Direct
DEC (X)
Indirect
DEC (Y)
Indirect
INC X
Short Direct
INC Y
Short Direct
INC V
Short Direct
INC W
Short Direct
INC A
Direct
INC rr
Direct
INC (X)
Indirect
INC (Y)
Indirect
RLC A
Inherent
SLA A
Inherent
SUB A, (X)
Indirect
SUB A, (Y)
Indirect
SUB A, rr
Direct
SUBI A, #N
Immediate
Notes:
X,Y.Indirect Register Pointers, V & W Short Direct RegistersD. Affected
# . Immediate data (stored in ROM memory)* . Not Affected
rr. Data space register
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tent or an immediate value in relation with the ad-
dressing mode. In CLR, DEC, INC instructions the
operand can be any of the 256 data space ad-
dresses. In COM, RLC, SLA the operand is always
the accumulator.
Bytes
Cycles
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4
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Flags
Z
C
*
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