ST62T65CM6 STMicroelectronics, ST62T65CM6 Datasheet - Page 62

IC MCU 8BIT OTP/EPROM 28 PSOIC

ST62T65CM6

Manufacturer Part Number
ST62T65CM6
Description
IC MCU 8BIT OTP/EPROM 28 PSOIC
Manufacturer
STMicroelectronics
Series
ST6r
Datasheet

Specifications of ST62T65CM6

Core Processor
ST6
Core Size
8-Bit
Speed
8MHz
Connectivity
SPI
Peripherals
LED, LVD, POR, WDT
Number Of I /o
21
Program Memory Size
3.8KB (3.8K x 8)
Program Memory Type
OTP
Eeprom Size
128 x 8
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
3 V ~ 6 V
Data Converters
A/D 13x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-SOIC (7.5mm Width)
Controller Family/series
ST6
No. Of I/o's
21
Eeprom Memory Size
128Byte
Ram Memory Size
128Byte
Cpu Speed
8MHz
No. Of Timers
2
Rohs Compliant
Yes
Processor Series
ST62T6x
Core
ST6
Data Bus Width
8 bit
Data Ram Size
128 B
Interface Type
SCI
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
21
Number Of Timers
1
Operating Supply Voltage
3 V to 6 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Development Tools By Supplier
ST62GP-EMU2, ST62E2XC-EPB/110, ST62E6XC-EPB/US, STREALIZER-II
Minimum Operating Temperature
- 40 C
On-chip Adc
8 bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
497-2103-5
ST6255C ST6265C ST6265B
Opcode Map Summary. The following table contains an opcode map for the instructions used by the ST6
Abbreviations for Addressing Modes: Legend:
dir
sd
imm
inh
ext
b.d
bt
pcr
ind
62/84
HI
0000
0001
0010
0011
0100
0101
0110
0111
1000
1001
1010
1011
1100
1101
1110
1111
A
B
C
D
E
0
1
2
3
4
5
6
7
8
9
F
Direct
Short Direct
Inherent
Extended
Bit Direct
Bit Test
Program Counter Relative
Indirect
Immediate
LOW
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
0000
RNZ
0
e
e
e
e
e
e
e
e
e
e
e
e
e
e
e
e
JRNZ 4
JRNZ 4
JRNZ 4
JRNZ 4
JRNZ 4
JRNZ 4
JRNZ 4
JRNZ 4
JRNZ 4
JRNZ 4
JRNZ 4
JRNZ 4
JRNZ 4
JRNZ 4
JRNZ 4
pcr 2
pcr 2
pcr 2
pcr 2
pcr 2
pcr 2
pcr 2
pcr 2
pcr 2
pcr 2
pcr 2
pcr 2
pcr 2
pcr 2
pcr 2
pcr 2
4
0001
abc
abc
abc
abc
abc
abc
abc
abc
abc
abc
abc
abc
abc
abc
abc
abc
1
CALL 2
CALL 2
CALL 2
CALL 2
CALL 2
CALL 2
CALL 2
CALL 2
CALL 2
CALL 2
CALL 2
CALL 2
CALL 2
CALL 2
CALL 2
CALL 2
ext 1
ext 1
ext 1
ext 1
ext 1
ext 1
ext 1
ext 1
ext 1
ext 1
ext 1
ext 1
ext 1
ext 1
ext 1
ext 1
#
e
b
rr
nn
abc
ee
0010
2
e
e
e
e
e
e
e
e
e
e
e
e
e
e
e
e
Indicates Illegal Instructions
5 Bit Displacement
3 Bit Address
1byte dataspace address
1 byte immediate data
12 bit address
8 bit Displacement
JRNC 5
JRNC 5
JRNC 5
JRNC 5
JRNC 5
JRNC 5
JRNC 5
JRNC 5
JRNC 5
JRNC 5
JRNC 5
JRNC 5
JRNC 5
JRNC 5
JRNC 5
JRNC 5
pcr 3
pcr 3
pcr 3
pcr 3
pcr 3
pcr 3
pcr 3
pcr 3
pcr 3
pcr 3
pcr 3
pcr 3
pcr 3
pcr 3
pcr 3
pcr 3
b0,rr,ee
b0,rr,ee
b4,rr,ee
b4,rr,ee
b2,rr,ee
b2,rr,ee
b6,rr,ee
b6,rr,ee
b1,rr,ee
b1,rr,ee
b5,rr,ee
b5,rr,ee
b3,rr,ee
b3,rr,ee
b7,rr,ee
b7,rr,ee
0011
3
JRR 2
JRR 2
JRR 2
JRR 2
JRR 2
JRR 2
JRR 2
JRR 2
JRS 2
JRS 2
JRS 2
JRS 2
JRS 2
JRS 2
JRS 2
JRS 2
bt 1
bt 1
bt 1
bt 1
bt 1
bt 1
bt 1
bt 1
bt 1
bt 1
bt 1
bt 1
bt 1
bt 1
bt 1
bt 1
e
0100
4
e
e
e
e
e
e
e
e
e
e
e
e
e
e
e
JRZ
JRZ 4
JRZ
JRZ 4
JRZ
JRZ 4
JRZ
JRZ 4
JRZ
JRZ 4
JRZ
JRZ 4
JRZ
JRZ 4
JRZ
JRZ 4
pcr
pcr 1
pcr
pcr 1
pcr
pcr 1
pcr
pcr 1
pcr
pcr 1
pcr
pcr 1
pcr
pcr 1
pcr
pcr 1
Cycle
Operand
Bytes
Addressing Mode
0101
a,w
a,x
a,y
a,v
w
5
#
#
#
#
#
#
#
#
x
y
v
INC 2
INC 2
INC 2
INC 2
LD 2
LD 2
LD 2
LD 2
sd 1
sd 1
sd 1
sd 1
sd 1
sd 1
sd 1
sd 1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
0110
6
e
e
e
e
e
e
e
e
e
e
e
e
e
e
e
e
JRC 4
JRC 4
JRC 4
JRC 4
JRC 4
JRC 4
JRC 4
JRC
JRC 4
JRC
JRC 4
JRC 4
JRC 4
JRC 4
JRC 4
JRC
2
1
prc 1
prc 2
prc 1
prc 2
prc 1
prc 2
prc 1
prc
prc 1
prc
prc 1
prc 2
prc 1
prc 2
prc 1
prc
e
JRC
0111
a,(x)
a,nn
a,(x)
a,(x)
a,nn
(x),a
a,(x)
a,(x)
a,nn
a,nn
a,nn
prc
(x)
(x)
7
#
#
#
ADDI
ANDI
SUBI
ADD
AND
SUB
DEC
imm
imm
imm
imm
imm
INC
CPI
LDI
CP
LD
ind
ind
ind
ind
LD
ind
ind
ind
ind
LOW
Mnemonic
0000
0001
0010
0011
0100
0101
0110
0111
1000
1001
1010
1011
1100
1101
1110
1111
A
B
C
D
E
0
1
2
3
4
5
6
7
8
9
F
HI

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