ST62T65CM6 STMicroelectronics, ST62T65CM6 Datasheet - Page 31
Manufacturer Part Number
IC MCU 8BIT OTP/EPROM 28 PSOIC
Specifications of ST62T65CM6
LED, LVD, POR, WDT
Number Of I /o
Program Memory Size
3.8KB (3.8K x 8)
Program Memory Type
128 x 8
128 x 8
Voltage - Supply (vcc/vdd)
3 V ~ 6 V
-40°C ~ 85°C
Package / Case
28-SOIC (7.5mm Width)
No. Of I/o's
Eeprom Memory Size
Ram Memory Size
No. Of Timers
Data Bus Width
Data Ram Size
Maximum Clock Frequency
Number Of Programmable I/os
Number Of Timers
Operating Supply Voltage
3 V to 6 V
Maximum Operating Temperature
+ 125 C
Development Tools By Supplier
ST62GP-EMU2, ST62E2XC-EPB/110, ST62E6XC-EPB/US, STREALIZER-II
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
3.3.2 Interrupt Procedure
The interrupt procedure is very similar to a call pro-
cedure, indeed the user can consider the interrupt
as an asynchronous call procedure. As this is an
asynchronous event, the user cannot know the
context and the time at which it occurred. As a re-
sult, the user should save all Data space registers
which may be used within the interrupt routines.
There are separate sets of processor flags for nor-
mal, interrupt and non-maskable interrupt modes,
which are automatically switched and so do not
need to be saved.
The following list summarizes the interrupt proce-
– The interrupt is detected.
– The C and Z flags are replaced by the interrupt
– The PC contents are stored in the first level of
– The normal interrupt lines are inhibited (NMI still
– The first internal latch is cleared.
– The associated interrupt vector is loaded in the PC.
WARNING: In some circumstances, when a
maskable interrupt occurs while the ST6 core is in
NORMAL mode and especially during the execu-
tion of an "ldi IOR, 00h" instruction (disabling all
maskable interrupts): if the interrupt arrives during
the first 3 cycles of the "ldi" instruction (which is a
4-cycle instruction) the core will switch to interrupt
mode BUT the flags CN and ZN will NOT switch to
the interrupt pair CI and ZI.
– User selected registers are saved within the in-
– The source of the interrupt is found by polling the
– The interrupt is serviced.
– Return from interrupt (RETI)
flags (or by the NMI flags).
terrupt service routine (normally on a software
interrupt flags (if more than one source is associ-
ated with the same vector).
– Automatically the MCU switches back to the nor-
The interrupt routine usually begins by the identify-
ing the device which generated the interrupt re-
quest (by polling). The user should save the regis-
ters which are used within the interrupt routine in a
software stack. After the RETI instruction is exe-
cuted, the MCU returns to the main routine.
Figure 20. Interrupt Processing Flow Chart
mal flag set (or the interrupt flag set) and pops
the previous PC value from the stack.
THE STACKED PC
ST6255C ST6265C ST6265B
AN INTERRUPT REQUEST
AND INTERRUPT MASK
IS THE CORE
CHECK IF THERE IS
INTERNAL MODE FLAG
PC INTO THE STACK
LOAD PC FROM