HD6417727BP160CV Renesas Electronics America, HD6417727BP160CV Datasheet - Page 249

• Manufacturer Part Number: HD6417727BP160CV
• Description: IC SH MPU ROMLESS 240BGA
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7700r

Specifications of HD6417727BP160CV

• Core Processor: SH-3 DSP
• Core Size: 32-Bit
• Speed: 160MHz
• Connectivity: FIFO, SCI, SIO, SmartCard, USB
• Peripherals: DMA, LCD, POR, WDT
• Number Of I /o: 104
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.7 V ~ 2.05 V
• Data Converters: A/D 6x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 240-BGA
• Package: 240CSP
• Family Name: SuperH
• Maximum Speed: 160 MHz
• Operating Supply Voltage: 1.8|3.3 V
• Data Bus Width: 32 Bit
• Number Of Programmable I/os: 104
• Interface Type: SCI/USB
• On-chip Adc: 6-chx10-bit
• On-chip Dac: 2-chx8-bit
• Number Of Timers: 4
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

Bit 0—DEI0 Interrupt Request (DEI0R): Indicates whether a DEI0 (DMAC) interrupt request
is generated.
Bit 0: DEI0R
0
1
7.3.9
The IRR2 is an 8-bit read-only register that indicates whether A/D converter, or SCIF interrupt
requests are generated. This register is initialized to H'00 at power-on reset or manual reset, but is
not initialized in standby mode.
Bits 7 to 5—Reserved: These bits are always read as 0. The write value should always be 0.
Bit 4—ADI Interrupt Request (ADIR): Indicates whether an ADI (ADC) interrupt request is
generated.
Bit 4: ADIR
0
1
Bit 3—TXI2 Interrupt Request (TXI2R): Indicates whether a TXI2 (SCIF) interrupt request is
generated.
Bit 3: TXI2R
0
1
Initial value:
Interrupt Request Register 2 (IRR2)
R/W:
Bit:
Description
A DEI0 interrupt request is not generated
A DEI0 interrupt request is generated
Description
An ADI interrupt request is not generated
An ADI interrupt request is generated
Description
A TXI2 interrupt request is not generated
A TXI2 interrupt request is generated
—
R
7
0
—
R
6
0
—
R
5
0
ADIR
R
4
0
Rev.6.00 Mar. 27, 2009 Page 191 of 1036
TXI2R
Section 7 Interrupt Controller (INTC)
R
3
0
BRI2R
R
2
0
REJ09B0254-0600
RXI2R
R
1
0
(Initial value)
(Initial value)
(Initial value)
ERI2R
R
0
0