HD6417727BP160CV Renesas Electronics America, HD6417727BP160CV Datasheet - Page 771

IC SH MPU ROMLESS 240BGA

HD6417727BP160CV

Manufacturer Part Number
HD6417727BP160CV
Description
IC SH MPU ROMLESS 240BGA
Manufacturer
Renesas Electronics America
Series
SuperH® SH7700r
Datasheet

Specifications of HD6417727BP160CV

Core Processor
SH-3 DSP
Core Size
32-Bit
Speed
160MHz
Connectivity
FIFO, SCI, SIO, SmartCard, USB
Peripherals
DMA, LCD, POR, WDT
Number Of I /o
104
Program Memory Type
ROMless
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
1.7 V ~ 2.05 V
Data Converters
A/D 6x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
240-BGA
Package
240CSP
Family Name
SuperH
Maximum Speed
160 MHz
Operating Supply Voltage
1.8|3.3 V
Data Bus Width
32 Bit
Number Of Programmable I/os
104
Interface Type
SCI/USB
On-chip Adc
6-chx10-bit
On-chip Dac
2-chx8-bit
Number Of Timers
4
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-

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23.6.4
EP1 has two 64-byte FIFOs, but the user can perform data reception and receive-data reads
without being aware of this dual-FIFO configuration.
When one FIFO is full after reception is completed, the USBIFR0/EP1 FULL bit is set. After the
first receive operation into one of the FIFOs when both FIFOs are empty, the other FIFO is empty,
and so the next packet can be received immediately. When both FIFOs are full, NACK is returned
EP1 Bulk-Out Transfer (Dual FIFOs)
bit automatically cleared to 0
USBIFR0/EP1 FULL status
USBIFR0/EP1 FULL status
Data reception from host
bit automatically set to 1
OUT token reception
USB function
in EP1 FIFO?
Both FIFOs
are empty?
Space
Figure 23.10 EP1 Bulk-Out Transfer Operation
Yes
Yes
ACK
NACK
No
No
Interrupt request
Interrupt request
Rev.6.00 Mar. 27, 2009 Page 713 of 1036
Read USBEP1 receive-data
Write 1 to EP1 read-end bit
data register (USBEPDR1)
(USBTRG/EP1 RDFN = 1)
size register (USBEPSZ1)
Section 23 USB Function Controller
Read data from USBEP1
Application
REJ09B0254-0600

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