HD6417727BP160CV Renesas Electronics America, HD6417727BP160CV Datasheet - Page 36

• Manufacturer Part Number: HD6417727BP160CV
• Description: IC SH MPU ROMLESS 240BGA
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7700r

Specifications of HD6417727BP160CV

• Core Processor: SH-3 DSP
• Core Size: 32-Bit
• Speed: 160MHz
• Connectivity: FIFO, SCI, SIO, SmartCard, USB
• Peripherals: DMA, LCD, POR, WDT
• Number Of I /o: 104
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.7 V ~ 2.05 V
• Data Converters: A/D 6x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 240-BGA
• Package: 240CSP
• Family Name: SuperH
• Maximum Speed: 160 MHz
• Operating Supply Voltage: 1.8|3.3 V
• Data Bus Width: 32 Bit
• Number Of Programmable I/os: 104
• Interface Type: SCI/USB
• On-chip Adc: 6-chx10-bit
• On-chip Dac: 2-chx8-bit
• Number Of Timers: 4
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

28.5 Interrupts ........................................................................................................................... 875
28.6 Definitions of A/D Conversion Accuracy......................................................................... 875
28.7 Usage Notes ...................................................................................................................... 876
Section 29 D/A Converter
29.1 Overview........................................................................................................................... 879
29.2 Register Descriptions ........................................................................................................ 881
29.3 Operation........................................................................................................................... 883
Section 30 PC Card Controller (PCC)
30.1 Overview........................................................................................................................... 885
30.2 Register Descriptions ........................................................................................................ 891
30.3 Operation........................................................................................................................... 903
Section 31 User-Debugging Interface (H-UDI)
31.1 Overview........................................................................................................................... 915
31.2 User Debugging Interface (H-UDI) .................................................................................. 915
Rev.6.00 Mar. 27, 2009 Page xxxiv of lvi
REJ09B0254-0600
28.4.2 Multi Mode (MULTI = 1, SCN = 0).................................................................... 869
28.4.3 Scan Mode (MULTI = 1, SCN = 1) ..................................................................... 871
28.4.4 Input Sampling and A/D Conversion Time ......................................................... 873
28.4.5 External Trigger Input Timing............................................................................. 874
28.7.1 Setting Analog Input Voltage .............................................................................. 876
28.7.2 Processing of Analog Input Pins .......................................................................... 876
28.7.3 Access Size and Read Data.................................................................................. 877
29.1.1 Features................................................................................................................ 879
29.1.2 Block Diagram..................................................................................................... 879
29.1.3 I/O Pins ................................................................................................................ 880
29.1.4 Register Configuration......................................................................................... 880
29.2.1 D/A Data Registers 0 and 1 (DADR0/1).............................................................. 881
29.2.2 D/A Control Register (DACR) ............................................................................ 881
30.1.1 Features................................................................................................................ 885
30.1.2 Block Diagram..................................................................................................... 886
30.1.3 Register Configuration......................................................................................... 887
30.1.4 PCMCIA Support................................................................................................. 888
30.2.1 Area 6 Interface Status Register (PCC0ISR) ....................................................... 891
30.2.2 Area 6 General Control Register (PCC0GCR) .................................................... 894
30.2.3 Area 6 Card Status Change Register (PCC0CSCR)............................................. 896
30.2.4 Area 6 Card Status Change Interrupt Enable Register (PCC0CSCIER) .............. 900
30.3.1 PC card Connection Specification (Interface Diagram, Pin Correspondence)..... 903
30.3.2 PC Card Interface Timing .................................................................................... 907
30.3.3 Usage Notes ......................................................................................................... 912
................................................................................................. 879
........................................................................... 885
.......................................................... 915