HD6417727BP160CV Renesas Electronics America, HD6417727BP160CV Datasheet - Page 490

• Manufacturer Part Number: HD6417727BP160CV
• Description: IC SH MPU ROMLESS 240BGA
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7700r

Specifications of HD6417727BP160CV

• Core Processor: SH-3 DSP
• Core Size: 32-Bit
• Speed: 160MHz
• Connectivity: FIFO, SCI, SIO, SmartCard, USB
• Peripherals: DMA, LCD, POR, WDT
• Number Of I /o: 104
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.7 V ~ 2.05 V
• Data Converters: A/D 6x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 240-BGA
• Package: 240CSP
• Family Name: SuperH
• Maximum Speed: 160 MHz
• Operating Supply Voltage: 1.8|3.3 V
• Data Bus Width: 32 Bit
• Number Of Programmable I/os: 104
• Interface Type: SCI/USB
• On-chip Adc: 6-chx10-bit
• On-chip Dac: 2-chx8-bit
• Number Of Timers: 4
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

Section 14 Direct Memory Access Controller (DMAC)
Register Configuration
Table 14.7 summarizes the CMT register configuration.
Table 14.7 Register Configuration
Name
Compare-match timer start
register
Compare-match timer
control/status register 0
Compare-match counter 0
Compare-match constant
register
Notes: 1. Only a 0 can be written to CMF bits in CMCSR0, to clear the flag.
14.4.2
Compare-Match Timer Start Register (CMSTR)
The compare-match timer start register (CMSTR) is a 16-bit register that selects whether compare-
match counter 0 (CMCNT0) is operated or halted. CMSTR is initialized to H'0000 by a reset, but
it retains its previous values in standby mode.
Bits 15 to 2—Reserved: These bits are always read as 0 and should only be written with 0.
Rev.6.00 Mar. 27, 2009 Page 432 of 1036
REJ09B0254-0600
Initial value:
Initial value:
2. When the address conversion by the MMU is not provided, use the address in
Register Descriptions
parentheses.
R/W:
R/W:
Bit:
Bit:
15
—
—
R
R
0
7
0
Abbreviation
CMSTR
CMCSR0
CMCNT0
CMCOR0
14
—
—
R
R
0
6
0
13
—
—
R
R
0
5
0
R/W
R/(W)
R/W
R/W
R/(W) *
12
—
—
R
R
0
4
0
1
H'0000
H'0000
Initial
Value
H'0000
H'FFFF
11
—
—
R
R
0
3
0
Address
H'04000070
(H'A4000070) *
H'04000072
(H'A4000072) *
H'04000074
(H'A4000074) *
H'04000076
(H'A4000076) *
10
—
—
R
R
0
2
0
R/W
2
2
2
2
—
—
R
0
0
9
1
Access Size
(Bits)
8, 16, 32
8, 16, 32
8, 16, 32
8, 16, 32
STR0
R/W
—
R
8
0
0
0