UPD78F0500AMC-CAB-AX Renesas Electronics America, UPD78F0500AMC-CAB-AX Datasheet - Page 305

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UPD78F0500AMC-CAB-AX

Manufacturer Part Number
UPD78F0500AMC-CAB-AX
Description
MCU 8BIT 30SSOP
Manufacturer
Renesas Electronics America
Series
78K0/Kx2r
Datasheet

Specifications of UPD78F0500AMC-CAB-AX

Core Processor
78K/0
Core Size
8-Bit
Speed
20MHz
Connectivity
3-Wire SIO, I²C, LIN, UART/USART
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
23
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
78K0/Kx2
R01UH0008EJ0401 Rev.4.01
Jul 15, 2010
This is an application example where the width set to CR01n (4 clocks in this example) is to be output from the TO0n
pin when the count value has been captured & cleared.
TM0n is cleared (to 0000H) at the rising edge detection of the TI00n pin and captured to CR00n at the falling edge
detection of the TI00n pin. The TO0n output level is inverted when TM0n is cleared (to 0000H) because the rising
edge of the TI00n pin has been detected or when the value of TM0n matches that of a compare register (CR01n).
When bit 1 (CRC0n1) of capture/compare control register 0n (CRC0n) is 1, the count value of TM0n is captured to
CR00n in the phase reverse to that of the input signal of the TI00n pin, but the capture interrupt signal (INTTM00n) is
not generated. However, the INTTM00n interrupt is generated when the valid edge of the TI01n pin is detected.
Mask the INTTM00n signal when it is not used.
Remark n = 0:
Capture & count clear input
Figure 7-32. Timing Example of Clear & Start Mode Entered by TI00n Pin Valid Edge Input
Compare match interrupt
n = 0, 1: 78K0/KE2 products whose flash memory is at least 48 KB, and 78K0/KF2 products
(TMC0n3, TMC0n2)
Compare register
Capture interrupt
(TI00n pin input)
Capture register
(b) TOC0n = 13H, PRM0n = 10H, CRC0n, = 03H, TMC0n = 0AH, CR01n = 0003H
TM0n register
Operable bits
TO0n output
(INTTM00n)
(INTTM01n)
78K0/KE2 products whose flash memory is less than 32 KB, and 78K0/KB2, 78K0/KC2,
78K0/KD2 products
(CR00n: Capture Register, CR01n: Compare Register) (2/2)
(CR00n)
(CR01n)
0003H
0000H
L
00
0000H
0003H
CHAPTER 7 16-BIT TIMER/EVENT COUNTERS 00 AND 01
4
10
M
M
N
4
N
4
S
S
4
P
P
305

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