UPD78F0500AMC-CAB-AX Renesas Electronics America, UPD78F0500AMC-CAB-AX Datasheet - Page 607

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UPD78F0500AMC-CAB-AX

Manufacturer Part Number
UPD78F0500AMC-CAB-AX
Description
MCU 8BIT 30SSOP
Manufacturer
Renesas Electronics America
Series
78K0/Kx2r
Datasheet

Specifications of UPD78F0500AMC-CAB-AX

Core Processor
78K/0
Core Size
8-Bit
Speed
20MHz
Connectivity
3-Wire SIO, I²C, LIN, UART/USART
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
23
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
78K0/Kx2
R01UH0008EJ0401 Rev.4.01
Jul 15, 2010
Remark
(6) Operation when arbitration loss occurs (no communication after arbitration loss)
Remark
ST
1: IICS0 = 0110×010B
2: IICS0 = 0010×110B
3: IICS0 = 0010×100B
4: IICS0 = 0010××00B
5: IICS0 = 00000001B
ST
1: IICS0 = 01000110B
2: IICS0 = 00000001B
When the device is used as a master in a multi-master system, read the MSTS0 bit each time interrupt request
signal INTIIC0 has occurred to check the arbitration result.
(a) When arbitration loss occurs during transmission of slave address data (when WTIM0 = 1)
AD6 to AD0 R/W ACK
AD6 to AD0 R/W ACK
(ii) When WTIM0 = 1
×:
: Always generated
: Generated only when SPIE0 = 1
: Always generated
: Generated only when SPIE0 = 1
Don’t care
1
1
2
D7 to D0
D7 to D0
ACK
ACK
3
D7 to D0
D7 to D0
CHAPTER 18 SERIAL INTERFACE IIC0
ACK
ACK
4
SP
SP
5
2
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