UPD78F0500AMC-CAB-AX Renesas Electronics America, UPD78F0500AMC-CAB-AX Datasheet - Page 959

• Manufacturer Part Number: UPD78F0500AMC-CAB-AX
• Description: MCU 8BIT 30SSOP
• Manufacturer: Renesas Electronics America
• Series: 78K0/Kx2r

Specifications of UPD78F0500AMC-CAB-AX

• Core Processor: 78K/0
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: 3-Wire SIO, I²C, LIN, UART/USART
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 23
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

78K0/Kx2
R01UH0008EJ0401 Rev.4.01
Jul 15, 2010
Serial
interface
UART0
Serial
interface
UART6
Function
POWER0, TXE0,
RXE0: Bits 7, 6,
5 of ASIM0
UART mode
UART
transmission
UART reception
Error of baud rate
Permissible baud
rate range during
reception
UART mode
TXB6: Transmit
buffer register 6
Details of
Function
Clear POWER0 to 0 after clearing TXE0 and RXE0 to 0 to set the operation stop
mode.
To start the communication, set POWER0 to 1, and then set TXE0 or RXE0 to 1.
Take relationship with the other party of communication when setting the port mode
register and port register.
After transmit data is written to TXS0, do not write the next transmit data before the
transmission completion interrupt signal (INTST0) is generated.
If a reception error occurs, read asynchronous serial interface reception error status
register 0 (ASIS0) and then read receive buffer register 0 (RXB0) to clear the error
flag.
Otherwise, an overrun error will occur when the next data is received, and the
reception error status will persist.
Reception is always performed with the “number of stop bits = 1”. The second stop bit
is ignored.
Keep the baud rate error during transmission to within the permissible error range at
the reception destination.
Make sure that the baud rate error during reception satisfies the range shown in (4)
Permissible baud rate range during reception.
Make sure that the baud rate error during reception is within the permissible error
range, by using the calculation expression shown below.
The T
reception side. To use this function, the reception side must be ready for reception of
inverted data.
If clock supply to serial interface UART6 is not stopped (e.g., in the HALT mode),
normal operation continues. If clock supply to serial interface UART6 is stopped (e.g.,
in the STOP mode), each register stops operating, and holds the value immediately
before clock supply was stopped. The T
before clock supply was stopped and outputs it. However, the operation is not
guaranteed after clock supply is resumed. Therefore, reset the circuit so that
POWER6 = 0, RXE6 = 0, and TXE6 = 0.
Set POWER6 = 1 and then set TXE6 = 1 (transmission) or RXE6 = 1 (reception) to
start communication.
TXE6 and RXE6 are synchronized by the base clock (f
enable transmission or reception again, set TXE6 or RXE6 to 1 at least two clocks of
the base clock after TXE6 or RXE6 has been cleared to 0. If TXE6 or RXE6 is set
within two clocks of the base clock, the transmission circuit or reception circuit may
not be initialized.
Set transmit data to TXB6 at least one base clock (f
If data is continuously transmitted, the communication timing from the stop bit to the
next start bit is extended two operating clocks of the macro. However, this does not
affect the result of communication because the reception side initializes the timing
when it has detected a start bit. Do not use the continuous transmission function if
the interface is used in LIN communication operation.
Do not write data to TXB6 when bit 1 (TXBF6) of asynchronous serial interface
transmission status register 6 (ASIF6) is 1.
Do not refresh (write the same value to) TXB6 by software during a communication
operation (when bits 7 and 6 (POWER6, TXE6) of asynchronous serial interface
operation mode register 6 (ASIM6) are 1 or when bits 7 and 5 (POWER6, RXE6) of
ASIM6 are 1).
Set transmit data to TXB6 at least one base clock (f
X
D6 output inversion function inverts only the transmission side and not the
Cautions
X
D6 pin also holds the value immediately
APPENDIX D LIST OF CAUTIONS
XCLK6
XCLK6
XCLK6
) after setting TXE6 = 1.
) after setting TXE6 = 1.
) set by CKSR6. To
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