UPD78F0500AMC-CAB-AX Renesas Electronics America, UPD78F0500AMC-CAB-AX Datasheet - Page 567

• Manufacturer Part Number: UPD78F0500AMC-CAB-AX
• Description: MCU 8BIT 30SSOP
• Manufacturer: Renesas Electronics America
• Series: 78K0/Kx2r

Specifications of UPD78F0500AMC-CAB-AX

• Core Processor: 78K/0
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: 3-Wire SIO, I²C, LIN, UART/USART
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 23
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

78K0/Kx2
R01UH0008EJ0401 Rev.4.01
Jul 15, 2010
IICX0
CLX0
IICX0
CLX0
Bit 0
Bit 0
Notes 1. The frequency that can be used for the peripheral hardware clock (f
Caution Determine the transfer clock frequency of I
0
0
0
0
0
0
0
0
0
1
1
1
1
The selection clock is set using a combination of bits 3, 1, and 0 (SMC0, CL01, and CL00) of IIC clock selection
register 0 (IICCL0) and bit 0 (CLX0) of IIC function expansion register 0 (IICX0).
SMC0
SMC0
Bit 3
Bit 3
2. If the peripheral hardware clock (f
3. This must not be set, because the 78K0/KB2 products are not mounted with the EXSCL0 pin.
4. Do not start communication with the external clock from the EXSCL0 pin when the internal high-speed
0
1
0
0
0
0
1
1
1
0
1
1
1
supply voltage and product specifications.
set CLX0, SMC0, CL01 and CL00 as follows.
oscillation clock and high-speed system clock are stopped while the CPU operates with the subsystem clock,
or when in the STOP mode.
the operation (by setting bit 7 (IICE0) of IIC control register 0 (IICC0) to 1). To change the transfer
clock frequency, clear IICE0 once to 0.
IICCL0
IICCL0
CL01
CL01
Bit 1
Bit 1
(The values shown in the table above are those when f
0
0
4.0 V ≤ V
2.7 V ≤ V
1.8 V ≤ V
(Standard products and
(A) grade products only)
0
0
1
1
0
1
1
×
0
1
1
Supply Voltage
CL00
CL00
Bit 0
Bit 0
0
×
0
1
0
1
×
0
1
×
×
0
1
DD
DD
DD
≤ 5.5 V
< 4.0 V
< 2.7 V
f
f
f
f
f
f
f
f
f
Setting prohibited
f
f
Setting prohibited
PRS
PRS
PRS
PRS
PRS
EXSCL0
PRS
PRS
EXSCL0
PRS
PRS
/2
/2
/2
/2
/4
/2
/4
/2
/4
Selection Clock
Selection Clock
Notes 3, 4
Note 3, 4
(f
W
(f
)
Notes 1, 2
W
Table 18-2. Selection Clock Setting
)
f
f
f
Conventional-specification Products
PRS
PRS
PRS
PRS
(
μ
≤ 20 MHz
≤ 10 MHz
≤ 5 MHz
PD78F05xx and 78F05xxD)
) operates on the internal high-speed oscillation clock (f
f
f
f
f
f
f
f
f
f
f
f
W
W
W
W
W
W
W
W
W
W
W
Transfer Clock
Transfer Clock
/44
/86
/86
/66
/24
/24
/18
/12
/12
/44
/24
(f
(f
2
C by using CLX0, SMC0, CL01, and CL00 before enabling
W
W
/m)
/m)
PRS
2.00 to 4.19 MHz
4.19 to 8.38 MHz
6.4 MHz
4.00 to 8.38 MHz
6.4 MHz
4.00 to 4.19 MHz
3.8 MHz to 4.2 MHz
Settable Selection Clock
CHAPTER 18 SERIAL INTERFACE IIC0
= f
Settable Selection
Clock (f
XH
(f
W
) Range
(XSEL = 1).)
f
f
PRS
PRS
W
Expanded-specification Products
(
) Range
μ
PRS
PD78F05xxA and 78F05xxDA)
≤ 20 MHz
≤ 5 MHz
) differs depending on the power
Normal mode
(SMC0 bit = 0)
High-speed mode
(SMC0 bit = 1)
High-speed mode
(SMC0 bit = 1)
Normal mode
(SMC0 bit = 0)
High-speed mode
(SMC0 bit = 1)
Operation Mode
Operation Mode
XH
) (XSEL = 0),
567