UPD78F0500AMC-CAB-AX Renesas Electronics America, UPD78F0500AMC-CAB-AX Datasheet - Page 620

• Manufacturer Part Number: UPD78F0500AMC-CAB-AX
• Description: MCU 8BIT 30SSOP
• Manufacturer: Renesas Electronics America
• Series: 78K0/Kx2r

Specifications of UPD78F0500AMC-CAB-AX

• Core Processor: 78K/0
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: 3-Wire SIO, I²C, LIN, UART/USART
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 23
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

78K0/Kx2
R01UH0008EJ0401 Rev.4.01
Jul 15, 2010
(3) Stop condition
Notes 1. To cancel wait, write “FFH” to IIC0 or set WREL0.
WREL0
INTIIC0
WREL0
INTIIC0
(When 8-Clock and 9-Clock Wait Is Selected for Master, 9-Clock Wait Is Selected for Slave) (3/3)
ACKD0
ACKE0
MSTS0
ACKD0
ACKE0
MSTS0
WTIM0
WTIM0
Processing by master device
Transfer lines
Processing by slave device
SPD0
TRC0
SDA0
SPD0
TRC0
STD0
STD0
SPT0
SCL0
SPT0
STT0
STT0
IIC0
IIC0
2. Write data to IIC0, not setting WREL0, in order to cancel a wait state during slave transmission.
3. If a wait state during slave transmission is canceled by setting WREL0, TRC0 will be cleared.
Receive
Transmit
H
H
L
L
L
Figure 18-28. Example of Slave to Master Communication
IIC0
D7
1
data Note 2
D6
2
D5
3
D4
4
D3
5
D2
6
D1
7
D0
8
CHAPTER 18 SERIAL INTERFACE IIC0
IIC0
NACK
Note 1
9
FFH Note 1
IIC0
Note 3
Notes 1, 3
condition
FFH Note 1
Stop
(When SPIE0 = 1)
(When SPIE0 = 1)
Receive
IIC0
condition
Start
address
AD6
1
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