UPD78F0500AMC-CAB-AX Renesas Electronics America, UPD78F0500AMC-CAB-AX Datasheet - Page 86

• Manufacturer Part Number: UPD78F0500AMC-CAB-AX
• Description: MCU 8BIT 30SSOP
• Manufacturer: Renesas Electronics America
• Series: 78K0/Kx2r

Specifications of UPD78F0500AMC-CAB-AX

• Core Processor: 78K/0
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: 3-Wire SIO, I²C, LIN, UART/USART
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 23
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

78K0/Kx2
(1) Port mode
(2) Control mode
2.2.9 P120 to P124 (port 12)
input for external low-voltage detection, connecting resonator for main system clock, connecting resonator for subsystem
clock, external clock input for main system clock, and external clock input for subsystem clock.
Note OCD0A and OCD0B are provided to the products with an on-chip debug function (
Remark √: Mounted, −: Not mounted
(1) Port mode
(2) Control mode
R01UH0008EJ0401 Rev.4.01
Jul 15, 2010
P120/INTP0/EXLVI
P121/X1/OCD0A
P122/X2/EXCLK/
OCD0B
P123/XT1
P124/XT2/EXCLKS
P120 to P124 function as an I/O port. These pins also function as pins for external interrupt request input, potential
The following operation modes can be specified in 1-bit units.
P70 to P77 function as an I/O port. P70 to P77 can be set to input or output port in 1-bit units using port mode
register 7 (PM7). Use of an on-chip pull-up resistor can be specified by pull-up resistor option register 7 (PU7).
P70 to P77 function as key interrupt input pins.
(a) KR0 to KR7
P120 to P124 function as an I/O port. P120 to P124 can be set to input or output port using port mode register 12
(PM12). Only for P120, use of an on-chip pull-up resistor can be specified by pull-up resistor option register 12
(PU12).
P120 to P124 function as pins for external interrupt request input, potential input for external low-voltage detection,
connecting resonator for main system clock, connecting resonator for subsystem clock, external clock input for main
system clock, and external clock input for subsystem clock.
(a) INTP0
only.
Note
These are the key interrupt input pins.
This functions as an external interrupt request input (INTP0) for which the valid edge (rising edge, falling edge, or
both rising and falling edges) can be specified.
Note
78K0/KB2
√
√
√
−
−
78K0/KC2
78K0/KD2
whose flash
memory is
Products
less than
32 KB
√
√
√
√
√
78K0/KE2
CHAPTER 2 PIN FUNCTIONS
memory is at
whose flash
Products
μ
48 KB
PD78F05xxD and 78F05xxDA)
least
78K0/KF2
86