UPD78F0500AMC-CAB-AX Renesas Electronics America, UPD78F0500AMC-CAB-AX Datasheet - Page 310

• Manufacturer Part Number: UPD78F0500AMC-CAB-AX
• Description: MCU 8BIT 30SSOP
• Manufacturer: Renesas Electronics America
• Series: 78K0/Kx2r

Specifications of UPD78F0500AMC-CAB-AX

• Core Processor: 78K/0
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: 3-Wire SIO, I²C, LIN, UART/USART
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 23
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

78K0/Kx2
R01UH0008EJ0401 Rev.4.01
Jul 15, 2010
Remark n = 0:
Figure 7-35. Example of Register Settings in Clear & Start Mode Entered by TI00n Pin Valid Edge Input (2/2)
(d) Prescaler mode register 0n (PRM0n)
(e) 16-bit timer counter 0n (TM0n)
(f) 16-bit capture/compare register 00n (CR00n)
(g) 16-bit capture/compare register 01n (CR01n)
ES1n1
0/1
By reading TM0n, the count value can be read.
When this register is used as a compare register and when its value matches the count value of TM0n, an
interrupt signal (INTTM00n) is generated. The count value of TM0n is not cleared.
To use this register as a capture register, select either the TI00n or TI01n pin
the valid edge of the capture trigger is detected, the count value of TM0n is stored in CR00n.
Note The timer output (TO0n) cannot be used when detection of the valid edge of the TI01n pin is used.
When this register is used as a compare register and when its value matches the count value of TM0n, an
interrupt signal (INTTM01n) is generated. The count value of TM0n is not cleared.
When this register is used as a capture register, the TI00n pin input is used as a capture trigger. When the valid
edge of the capture trigger is detected, the count value of TM0n is stored in CR01n.
n = 0, 1: 78K0/KE2 products whose flash memory is at least 48 KB, and 78K0/KF2 products
ES1n0
0/1
78K0/KE2 products whose flash memory is less than 32 KB, and 78K0/KB2, 78K0/KC2,
78K0/KD2 products
ES0n1
0/1
ES0n0
0/1
3
0
CHAPTER 7 16-BIT TIMER/EVENT COUNTERS 00 AND 01
2
0
PRM0n1 PRM0n0
0/1
0/1
Count clock selection
(setting TI00n valid edge is prohibited)
00: Falling edge detection
01: Rising edge detection
10: Setting prohibited
11: Both edges detection
00: Falling edge detection
01: Rising edge detection
10: Setting prohibited
11: Both edges detection
(setting prohibited when CRC0n1 = 1)
Note
input as a capture trigger. When
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