UPD78F0500AMC-CAB-AX Renesas Electronics America, UPD78F0500AMC-CAB-AX Datasheet - Page 703

• Manufacturer Part Number: UPD78F0500AMC-CAB-AX
• Description: MCU 8BIT 30SSOP
• Manufacturer: Renesas Electronics America
• Series: 78K0/Kx2r

Specifications of UPD78F0500AMC-CAB-AX

• Core Processor: 78K/0
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: 3-Wire SIO, I²C, LIN, UART/USART
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 23
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

78K0/Kx2
25.4.1 When used as reset
(1) When detecting level of supply voltage (V
R01UH0008EJ0401 Rev.4.01
Jul 15, 2010
• When starting operation
• When stopping operation
<1> Mask the LVI interrupt (LVIMK = 1).
<2> Clear bit 2 (LVISEL) of the low-voltage detection register (LVIM) to 0 (detects level of supply voltage (V
<3> Set the detection voltage using bits 3 to 0 (LVIS3 to LVIS0) of the low-voltage detection level selection
<4> Set bit 7 (LVION) of LVIM to 1 (enables LVI operation).
<5> Use software to wait for an operation stabilization time (10
<6> Wait until it is checked that (supply voltage (V
<7> Set bit 1 (LVIMD) of LVIM to 1 (generates reset when the level is detected).
Figure 25-5 shows the timing of the internal reset signal generated by the low-voltage detector. The numbers in
this timing chart correspond to <1> to <7> above.
Cautions 1. <1> must always be executed. When LVIMK = 0, an interrupt may occur immediately after the
Either of the following procedures must be executed.
•
•
When using 8-bit memory manipulation instruction:
Write 00H to LVIM.
When using 1-bit memory manipulation instruction:
Clear LVIMD to 0 and then LVION to 0.
(default value).
register (LVIS).
2. If supply voltage (V
processing in <4>.
signal is not generated.
DD
) ≥ detection voltage (V
DD
)
DD
) ≥ detection voltage (V
CHAPTER 25 LOW-VOLTAGE DETECTOR
μ
LVI
s (MIN.)).
) when LVIMD is set to 1, an internal reset
LVI
)) by bit 0 (LVIF) of LVIM.
DD
703
))