HD6417750SBP200 Renesas Electronics America, HD6417750SBP200 Datasheet - Page 333

• Manufacturer Part Number: HD6417750SBP200
• Description: IC SUPERH MPU ROMLESS 256BGA
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7750r

Specifications of HD6417750SBP200

• Core Processor: SH-4
• Core Size: 32-Bit
• Speed: 200MHz
• Connectivity: EBI/EMI, FIFO, SCI, SmartCard
• Peripherals: DMA, POR, WDT
• Number Of I /o: 28
• Program Memory Type: ROMless
• Ram Size: 24K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 2.07 V
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 256-BGA
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -

(e) Flow dependency (cont)
(g) Anti-flow dependency
(f) Output dependency
LDS
FLOAT FPUL,FR0
LDS
FLOAT FPUL,R1
FTRC
STS
FTRC
STS
FSQRT FR4
FMOV
FADD
FMOV
FTRV
FMOV @R1,XD0
FADD DR0,DR2
FMOV FR4,FR1
XMTRX,FV0
R0,FPUL
R1,FPUL
FR0,FPUL
FPUL,R0
FR1,FPUL
FPUL,R1
FR0,FR4
DR0,DR2
FR0,FR3
Figure 8.3 Examples of Pipelined Execution (cont)
I
I
I
I
I
I
I
I
I
I
D
D
D
D
D
I
D
D
D
D
I
I
I
D
2 stall cycles
EX
F1
F1
F1
F1
10 stall cycles = latency (11) - 1
D
F0
D
D
D
d
d
d
I
I
6 stall cycles = longest latency (8) - 2
NA
F1
EX
EX
F1
F1
F1
F2
F2
F2
F1
F0
F2
D
D
d
d
d
5 stall cycles
Effectively 1-cycle latency for consecutive LDS/FLOAT instructions
NA
FS
NA
F3
F2
F1
F2
EX
F2
F1
F2
F1
EX
FS
FS
F1
F2
F0
FS
S
d
d
d
FS
FS
NA
F2
F1
FS
F1
F2
F2
F1
F2
NA
F0
S
FS
FS
S
d
d
Effectively 1-cycle latency for consecutive
FTRC/STS instructions
FS
F2
F1
FS
FS
FS
F1
F2
F1
F2
F1
Rev.7.00 Oct. 10, 2008 Page 247 of 1074
S
S
FS
F2
EX
FS
F1
F2
F2
FS
F2
F1
MA
FS
FS
FS
F2
EX
F1
F2
FS
The registers are written-back
in program order.
11-cycle latency
FR3 write
7-cycle latency for lower FR
NA
FS
F2
S
FS
FR2 write
8-cycle latency for upper FR
FS
Section 8 Pipelining
S
REJ09B0366-0700